参数资料
| 型号： | XC6VSX315T-L1FF1759I |
| 厂商： | Xilinx Inc |
| 文件页数： | 2/11页 |
| 文件大小： | 0K |
| 描述： | IC FPGA VIRTEX-6SXT 1759FFBGA |
| 产品培训模块： | Virtex-6 FPGA Overview |
| 产品变化通告： | Virtex-6 FIFO Input Logic Reset 18/Apr/2011 |
| 标准包装： | 12 |
| 系列： | Virtex® 6 SXT |
| LAB/CLB数： | 24600 |
| 逻辑元件/单元数： | 314880 |
| RAM 位总计： | 25952256 |
| 输入/输出数： | 720 |
| 电源电压： | 0.91 V ~ 0.97 V |
| 安装类型： | 表面贴装 |
| 工作温度： | -40°C ~ 100°C |
| 封装/外壳： | 1759-BBGA，FCBGA |
| 供应商设备封装： | 1759-FCBGA |
Virtex-6 Family Overview
DS150 (v2.4) January 19, 2012
Product Specification
10
Revision History
The following table shows the revision history for this document:
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Date
Version
Description of Revisions
02/02/09
1.0
Initial Xilinx release.
05/05/09
1.1
Added the FF1156 package for both the XC6VSX315T and XC6VSX475T devices in Table2, page3.
Updated the PCI Express design discussion on page 9 to remove the LogiCORE wrapper (<100 LUT)
description and clarify 8 lanes at the 5.0 Gb/s data rate. Clerical edits to Global Clock Lines and
10/100/1000 Mb/s Ethernet Controller (2,500 Mb/s Supported) sections. Overall clarifications made in
text.
06/24/09
1.2
Added ordering information and FPGA documentation sections.
09/16/09
2.0
Added Virtex-6 HXT family information. Updated number to 26 Mb in Configuration section.
11/06/09
2.1
Clarified distributed RAM features on page 1. Updated CLB slice number for the XC6VHX565T in
Table 1. Updated compliance to the PCI Express Base Specification Revision 2.0. Updated Integrated
Interface Blocks for PCI Express Designs section with link to documentation.
01/28/10
2.2
In Table 1, there are two Ethernet MACs in the XC6VHX255T. Under Clock Management, page 5,
revised the VCO frequency minimum to 600 MHz which also revised the phase-shift timing increment.
Updated GTX transceivers operating data rate range to 6.6 Gb/s. Changed GTX PLL input reference
clock frequency divider.
03/24/11
2.3
Changed document classification to Preliminary Product Specification from Advance Product
Specification. Updated Figure 1.
01/19/12
2.4
Changed document classification to Product Specification from Preliminary Product Specification.
Ordering Information (including Figure 1).
相关PDF资料 |
PDF描述 |
|---|---|
| IDT71V016SA20PHGI8 | IC SRAM 1MBIT 20NS 44TSOP |
| XC6VSX315T-2FF1759I | IC FPGA VIRTEX-6SXT 1759FFBGA |
| IDT71V016SA12PHGI8 | IC SRAM 1MBIT 12NS 44TSOP |
| XC6VSX315T-L1FFG1759I | IC FPGA VIRTEX 6 314K 1759FFGBGA |
| XC6VSX315T-3FFG1759C | IC FPGA VIRTEX 6 314K 1759FFGBGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XC6VSX315T-L1FFG1156C | 功能描述:IC FPGA VIRTEX 6 314K 1156FFGBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Virtex® 6 SXT 产品变化通告:XC4000(E,L) Discontinuation 01/April/2002 标准包装:24 系列:XC4000E/X LAB/CLB数:100 逻辑元件/单元数:238 RAM 位总计:3200 输入/输出数:80 门数:3000 电源电压:4.5 V ~ 5.5 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:120-BCBGA 供应商设备封装:120-CPGA（34.55x34.55） |
| XC6VSX315T-L1FFG1156CES | 制造商:Xilinx 功能描述: |
| XC6VSX315T-L1FFG1156I | 功能描述:IC FPGA VIRTEX 6 314K 1156FFGBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Virtex® 6 SXT 产品变化通告:XC4000(E,L) Discontinuation 01/April/2002 标准包装:24 系列:XC4000E/X LAB/CLB数:100 逻辑元件/单元数:238 RAM 位总计:3200 输入/输出数:80 门数:3000 电源电压:4.5 V ~ 5.5 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:120-BCBGA 供应商设备封装:120-CPGA（34.55x34.55） |
| XC6VSX315T-L1FFG1759C | 功能描述:IC FPGA VIRTEX 6 314K 1759FFGBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Virtex® 6 SXT 产品变化通告:XC4000(E,L) Discontinuation 01/April/2002 标准包装:24 系列:XC4000E/X LAB/CLB数:100 逻辑元件/单元数:238 RAM 位总计:3200 输入/输出数:80 门数:3000 电源电压:4.5 V ~ 5.5 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:120-BCBGA 供应商设备封装:120-CPGA（34.55x34.55） |
| XC6VSX315T-L1FFG1759I | 功能描述:IC FPGA VIRTEX 6 314K 1759FFGBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Virtex® 6 SXT 产品变化通告:XC4000(E,L) Discontinuation 01/April/2002 标准包装:24 系列:XC4000E/X LAB/CLB数:100 逻辑元件/单元数:238 RAM 位总计:3200 输入/输出数:80 门数:3000 电源电压:4.5 V ~ 5.5 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:120-BCBGA 供应商设备封装:120-CPGA（34.55x34.55） |
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