参数资料
型号: XC95108-7PC84I
厂商: XILINX INC
元件分类: PLD
英文描述: XC95108 In-System Programmable CPLD
中文描述: FLASH PLD, 7.5 ns, PQCC84
封装: PLASTIC, LCC-84
文件页数: 1/10页
文件大小: 189K
代理商: XC95108-7PC84I
DS066 (v4.4) April 3, 2006
1
Product Specification
2006 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
Features
7.5 ns pin-to-pin logic delays on all pins
fCNT to 125 MHz
108 macrocells with 2,400 usable gates
Up to 108 user I/O pins
5V in-system programmable
-
Endurance of 10,000 program/erase cycles
-
Program/erase over full commercial voltage and
temperature range
Enhanced pin-locking architecture
Flexible 36V18 Function Block
-
90 product terms drive any or all of 18 macrocells
within Function Block
-
Global and product term clocks, output enables,
set and reset signals
Extensive IEEE Std 1149.1 boundary-scan (JTAG)
support
Programmable power reduction mode in each
macrocell
Slew rate control on individual outputs
User programmable ground pin capability
Extended pattern security features for design
protection
High-drive 24 mA outputs
3.3V or 5V I/O capability
Advanced CMOS 5V FastFLASH technology
Supports parallel programming of more than one
XC9500 concurrently
Available in 84-pin PLCC, 100-pin PQFP, 100-pin
TQFP, and 160-pin PQFP packages
Description
The XC95108 is a high-performance CPLD providing
advanced in-system programming and test capabilities for
general purpose logic integration. It is comprised of eight
36V18 Function Blocks, providing 2,400 usable gates with
propagation delays of 7.5 ns. See Figure 2 for the architec-
ture overview.
Power Management
Power dissipation can be reduced in the XC95108 by con-
figuring macrocells to standard or low-power modes of
operation. Unused macrocells are turned off to minimize
power dissipation.
Operating current for each design can be approximated for
specific operating conditions using the following equation:
ICC (mA) = MCHP (1.7) + MCLP (0.9) + MC (0.006 mA/MHz) f
Where:
MCHP = Macrocells in high-performance mode
MCLP = Macrocells in low-power mode
MC = Total number of macrocells used
f = Clock frequency (MHz)
Figure 1 shows a typical calculation for the XC95108
device.
0
XC95108 In-System
Programmable CPLD
DS066 (v4.4) April 3, 2006
05
Product Specification
R
Figure 1: Typical ICC vs. Frequency for XC95108
Clock Frequency (MHz)
Typical
I
CC
(mA)
050
100
(180)
(250)
(170)
200
300
100
High Performance
Low Power
DS066_01_110501
相关PDF资料
PDF描述
XC95108-7PQ100C XC95108 In-System Programmable CPLD
XC95108-7PQ100I XC95108 In-System Programmable CPLD
XC95108-7PQ160C XC95108 In-System Programmable CPLD
XC95108-7PQ160I Circular Connector; No. of Contacts:21; Series:; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:22; Circular Contact Gender:Pin; Circular Shell Style:Wall Mount Receptacle; Insert Arrangement:22-21 RoHS Compliant: No
XC95108-7TQ100C Circular Connector; No. of Contacts:61; Series:; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:24; Circular Contact Gender:Socket; Circular Shell Style:Wall Mount Receptacle; Insert Arrangement:24-61 RoHS Compliant: No
相关代理商/技术参数
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XC95108-7PQ100I 功能描述:IC CPLD 108 MCELL I-TEMP 100PQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - CPLD(复杂可编程逻辑器件) 系列:XC9500 标准包装:24 系列:CoolRunner II 可编程类型:系统内可编程 最大延迟时间 tpd(1):7.1ns 电压电源 - 内部:1.7 V ~ 1.9 V 逻辑元件/逻辑块数目:24 宏单元数:384 门数:9000 输入/输出数:173 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:208-BFQFP 供应商设备封装:208-PQFP(28x28) 包装:托盘
XC95108-7PQ160C 功能描述:IC CPLD 108 MCELL C-TEMP 160PQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - CPLD(复杂可编程逻辑器件) 系列:XC9500 标准包装:24 系列:CoolRunner II 可编程类型:系统内可编程 最大延迟时间 tpd(1):7.1ns 电压电源 - 内部:1.7 V ~ 1.9 V 逻辑元件/逻辑块数目:24 宏单元数:384 门数:9000 输入/输出数:173 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:208-BFQFP 供应商设备封装:208-PQFP(28x28) 包装:托盘
XC95108-7PQ160C0685 制造商:Xilinx 功能描述: