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参数资料
| 型号： | XCR3128XL-10VQ100C |
| 厂商： | Xilinx Inc |
| 文件页数： | 2/12页 |
| 文件大小： | 0K |
| 描述： | IC CR CPLD 3K 128MCELL 100-VQFP |
| 标准包装： | 90 |
| 系列： | CoolRunner XPLA3 |
| 可编程类型： | 系统内可编程（最少 1K 次编程/擦除循环） |
| 最大延迟时间 tpd(1)： | 9.1ns |
| 电压电源 - 内部： | 3 V ~ 3.6 V |
| 逻辑元件/逻辑块数目： | 8 |
| 宏单元数： | 128 |
| 门数： | 3000 |
| 输入/输出数： | 84 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-TQFP |
| 供应商设备封装： | 100-VQFP（14x14） |
| 包装： | 托盘 |
| 产品目录页面： | 600 (CN2011-ZH PDF) |
| 其它名称： | 122-1282 |
CoolRunner XPLA3 CPLD
10
DS012 (v2.5) May 26, 2009
Product Specification
R
Absolute Maximum Ratings
Table 7: Programming Specifications
Symbol
Parameter
Min.
Max.
Unit
DC Parameters
VCCP
VCC supply program/verify
3.0
3.6
V
ICCP
ICC limit program/verify(1)
-30
mA
VIH
Input voltage (High)
2.0
-
V
VIL
Input voltage (Low)
-
0.8
V
VOL
Output voltage (Low)
-
0.4
V
VOH
Output voltage (High)
2.4
-
V
AC Parameters
FMAX
TCK maximum frequency
-
10
MHz
PWE
Pulse width erase
100
-
ms
PWP
Pulse width program
10
-
ms
PWV
Pulse width verify
10
-
μs
TINIT
Initialization time(1)
-200
μs
TMS_SU
TMS setup time before TCK
↑
10
-
ns
TDI_SU
TDI setup time before TCK
↑
10
-
ns
TMS_H
TMS hold time after TCK
↑
20
-
ns
TDI_H
TDI hold time after TCK
↑
20
-
ns
TDO_CO
TDO valid after TCK
↓
-30
ns
Notes:
1.
Family specification. See individual device data sheets for specific device measurements.
Symbol
Parameter(1)
Min.
Max.
Unit
VCC
Supply voltage(2) relative to GND
–0.5
4.0
V
VI
Input voltage(3) relative to GND
–0.5
5.5(4)
V
IOUT
Output current, per pin
–100
100
mA
TJ
Maximum junction temperature
–40
150
°C
TSTR
Storage temperature
–65
150
°C
Notes:
1.
Stresses above those listed might cause malfunction or permanent damage to the device. This is a stress rating only. Functional
operation at these or any other condition above those indicated in the operational and programming specification is not implied.
2.
The chip supply voltage must rise monotonically.
3.
Maximum DC undershoot below GND must be limited to either 0.5V or 10 mA, whichever is easier to achieve. During transitions, the
device pins can undershoot to –2.0V or overshoot to 7.0V, provided this over- or undershoot lasts less than 10 ns and with the forcing
current being limited to 200 mA.
4.
External I/O voltage must not exceed VCC by 4.0V.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XCR3128XL-10VQ100C0771 | 制造商:Xilinx 功能描述: |
| XCR3128XL-10VQ100I | 制造商:Xilinx 功能描述:CPLD COOLRUNNER XPLA3 3K GATES 128 MCRCLLS 125MHZ 0.35UM 3.3 - Trays 制造商:Xilinx 功能描述:XLXXCR3128XL-10VQ100I IC SYSTEM GATE |
| XCR3128XL-10VQ100I0771 | 制造商:Xilinx 功能描述: |
| XCR3128XL-10VQ100Q | 制造商:Xilinx 功能描述:XILINX XCR3128XL-10VQ100Q CPLD - Trays 制造商:Xilinx 功能描述:Xilinx XCR3128XL-10VQ100Q CPLD |
| XCR3128XL-10VQG100C | 制造商:Xilinx 功能描述:CPLD COOLRUNNER XPLA3 3K GATES 128 MCRCLLS 125MHZ 0.35UM 3.3 - Trays 制造商:Xilinx 功能描述:XLXXCR3128XL-10VQG100C IC SYSTEM GATE |
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