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| 型号： | XCS10XL-4VQ280C |
| 厂商： | Xilinx, Inc. |
| 英文描述： | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| 中文描述： | 斯巴达和Spartan - xL的家庭现场可编程门阵列 |
| 文件页数： | 47/82页 |
| 文件大小： | 863K |
| 代理商： | XCS10XL-4VQ280C |
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Spartan and Spartan-XL Families Field Programmable Gate Arrays
DS060 (v1.6) September 19, 2001
Product Specification
1-800-255-7778
R
Spartan IOB Output Switching Characteristic Guidelines
Testing of switching parameters is modeled after testing
methods specified by MIL-M-38510/605. All devices are
100% functionally tested. Internal timing parameters are
derived from measuring internal test patterns. Listed below
are representative values. For more specific, more precise,
and worst-case guaranteed data, use the values reported
by the static timing analyzer (TRCE in the Xilinx Develop-
ment System) and back-annotated to the simulation netlist.
These path delays, provided as a guideline, have been
extracted from the static timing analyzer report. All timing
parameters assume worst-case operating conditions (sup-
ply
voltage
and
junction
temperature).
Values
are
expressed in nanoseconds unless otherwise noted.
Symbol
Description
Device
Speed Grade
Units
-4
-3
Min
Max
Min
Max
Clocks
TCH
Clock High
All devices
3.0
-
4.0
-
ns
TCL
Clock Low
All devices
3.0
-
4.0
-
ns
Propagation Delays - TTL Outputs(1,2)
TOKPOF
Clock (OK) to Pad, fast
All devices
-
3.3
-
4.5
ns
TOKPOS
Clock (OK to Pad, slew-rate limited
All devices
-
6.9
-
7.0
ns
TOPF
Output (O) to Pad, fast
All devices
-
3.6
-
4.8
ns
TOPS
Output (O) to Pad, slew-rate limited
All devices
-
7.2
-
7.3
ns
TTSHZ
3-state to Pad High-Z (slew-rate independent)
All devices
-
3.0
-
3.8
ns
TTSONF
3-state to Pad active and valid, fast
All devices
-
6.0
-
7.3
ns
TTSONS
3-state to Pad active and valid, slew-rate limited
All devices
-
9.6
-
9.8
ns
Setup and Hold Times
TOOK
Output (O) to clock (OK) setup time
All devices
2.5
-
3.8
-
ns
TOKO
Output (O) to clock (OK) hold time
All devices
0.0
-
0.0
-
ns
TECOK
Clock Enable (EC) to clock (OK) setup time
All devices
2.0
-
2.7
-
ns
TOKEC
Clock Enable (EC) to clock (OK) hold time
All devices
0.0
-
0.5
-
ns
Global Set/Reset
TMRW
Minimum GSR pulse width
All devices
11.5
13.5
ns
TRPO
Delay from GSR input to any Pad
XCS05
-
12.0
-
15.0
ns
XCS10
-
12.5
-
15.7
ns
XCS20
-
13.0
-
16.2
ns
XCS30
-
13.5
-
16.9
ns
XCS40
-
14.0
-
17.5
ns
Notes:
1.
Delay adder for CMOS Outputs option (with fast slew rate option): for -3 speed grade, add 1.0 ns; for -4 speed grade, add 0.8 ns.
2.
Delay adder for CMOS Outputs option (with slow slew rate option): for -3 speed grade, add 2.0 ns; for -4 speed grade, add 1.5 ns.
3.
Output timing is measured at ~50% VCC threshold, with 50 pF external capacitive loads including test fixture. Slew-rate limited output
rise/fall times are approximately two times longer than fast output rise/fall times.
4.
Voltage levels of unused pads, bonded or unbonded, must be valid logic levels. Each can be configured with the internal pull-up
(default) or pull-down resistor, or configured as a driven output, or can be driven from an external source.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XCS10XL-4VQ280I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS10XL-4VQ84C | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS10XL-4VQ84I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS10XL-4VQG100C | 功能描述:IC SPARTAN-XL FPGA 10K 100-VQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Spartan®-XL 标准包装:1 系列:Kintex-7 LAB/CLB数:25475 逻辑元件/单元数:326080 RAM 位总计:16404480 输入/输出数:350 门数:- 电源电压:0.97 V ~ 1.03 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:900-BBGA，FCBGA 供应商设备封装:900-FCBGA（31x31） 其它名称:122-1789 |
| XCS10XL-4VQG100I | 功能描述:IC SPARTAN-XL FPGA 10K 100-VQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Spartan®-XL 标准包装:1 系列:Kintex-7 LAB/CLB数:25475 逻辑元件/单元数:326080 RAM 位总计:16404480 输入/输出数:350 门数:- 电源电压:0.97 V ~ 1.03 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:900-BBGA，FCBGA 供应商设备封装:900-FCBGA（31x31） 其它名称:122-1789 |
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