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| 型号： | XCS40-3TQ208I |
| 厂商： | Xilinx, Inc. |
| 英文描述： | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| 中文描述： | 斯巴达和Spartan - xL的家庭现场可编程门阵列 |
| 文件页数： | 49/82页 |
| 文件大小： | 863K |
| 代理商： | XCS40-3TQ208I |
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Spartan and Spartan-XL Families Field Programmable Gate Arrays
DS060 (v1.6) September 19, 2001
Product Specification
1-800-255-7778
R
Spartan-XL DC Characteristics Over Operating Conditions
Supply Current Requirements During Power-On
Spartan-XL FPGAs require that a minimum supply current
ICCPO be provided to the VCC lines for a successful power
on. If more current is available, the FPGA can consume
more than ICCPO min., though this cannot adversely affect
reliability.
A maximum limit for ICCPO is not specified. Be careful when
using foldback/crowbar supplies and fuses. It is possible to
control the magnitude of ICCPO by limiting the supply current
available to the FPGA. A current limit below the trip level will
avoid inadvertently activating over-current protection cir-
cuits.
Symbol
Description
Min
Typ.
Max
Units
VOH
High-level output voltage @ IOH = –4.0 mA, VCC min (LVTTL)
2.4
-
V
High-level output voltage @ IOH = –500 A, (LVCMOS)
90% VCC
--
V
VOL
Low-level output voltage @ IOL = 12.0 mA, VCC min (LVTTL)(1)
--
0.4
V
Low-level output voltage @ IOL = 24.0 mA, VCC min (LVTTL)(2)
--
0.4
V
Low-level output voltage @ IOL = 1500 A, (LVCMOS)
-
10% VCC
V
VDR
Data retention supply voltage (below which configuration data
may be lost)
2.5
-
V
ICCO
Quiescent FPGA supply current(3,4)
Commercial
-
0.1
2.5
mA
Industrial
-
0.1
5
mA
ICCPD
Power Down FPGA supply current(3,5)
Commercial
-
0.1
2.5
mA
Industrial
-
0.1
5
mA
IL
Input or output leakage current
–10
-
10
A
CIN
Input capacitance (sample tested)
-
10
pF
IRPU
Pad pull-up (when selected) @ VIN = 0V (sample tested)
0.02
-
0.25
mA
IRPD
Pad pull-down (when selected) @ VIN = 3.3V (sample tested)
0.02
-
mA
Notes:
1.
With up to 64 pins simultaneously sinking 12 mA (default mode).
2.
With up to 64 pins simultaneously sinking 24 mA (with 24 mA option selected).
3.
With 5V tolerance not selected, no internal oscillators, and the FPGA configured with the Tie option.
4.
With no output current loads, no active input resistors, and all package pins at VCC or GND.
5.
With PWRDWN active.
Symbol
Description
Min
Max
Units
ICCPO
Total VCC supply current required during power-on
100
-
mA
TCCPO
VCC ramp time(2,3)
-50
ms
Notes:
1.
The ICCPO requirement applies for a brief time (commonly only a few milliseconds) when VCC ramps from 0 to 3.3V.
2.
The ramp time is measured from GND to VCC max on a fully loaded board.
3.
VCC must not dip in the negative direction during power on.
相关PDF资料 |
PDF描述 |
|---|---|
| XCS40-3TQ240C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40-3TQ240I | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40-3TQ256C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40-3TQ256I | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40-3TQ280C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XCS40-3TQ240C | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40-3TQ240I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40-3TQ256C | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40-3TQ256I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40-3TQ280C | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
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