参数资料
型号: XR16C854CV-F
厂商: Exar Corporation
文件页数: 13/53页
文件大小: 0K
描述: IC UART FIFO 128B QUAD 64LQFP
标准包装: 160
特点: *
通道数: 4,QUART
FIFO's: 128 字节
规程: RS232,RS485
电源电压: 2.97 V ~ 5.5 V
带自动流量控制功能:
带IrDA 编码器/解码器:
带故障启动位检测功能:
带调制解调器控制功能:
带CMOS:
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(10x10)
包装: 托盘
其它名称: 1016-1653
XR16C854CV-F-ND
XR16C854/854D
20
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
REV. 3.1.0
The infrared encoder and decoder are enabled by setting MCR register bit-6 to a ‘1’. When the infrared feature
is enabled, the transmit data output, TX, idles at logic zero level. Likewise, the RX input assumes an idle level
of logic zero from a reset and power up, see Figure 12.
Typically, the wireless infrared decoder receives the input pulse from the infrared sensing diode on the RX pin.
Each time it senses a light pulse, it returns a logic 1 to the data bit stream. However, this is not true with some
infrared modules on the market which indicate a logic 0 by a light pulse. So the 854 has a provision to invert
the input polarity to accomodate this. In this case user can enable FCTR bit-2 to invert the input signal.
2.19
Sleep Mode with Auto Wake-Up
The 854 supports low voltage system designs, hence, a sleep mode is included to reduce its power
consumption when the chip is not actively used.
All of these conditions must be satisfied for the 854 to enter sleep mode:
s
no interrupts pending for all four channels of the 854 (ISR bit-0 = 1)
s
sleep mode of all four channels are enabled (IER bit-4 = 1)
s
modem inputs are not toggling (MSR bits 0-3 = 0)
s
RX input pins are idling at a logic 1
The 854 stops its crystal oscillator to conserve power in the sleep mode. User can check the XTAL2 pin for no
clock output as an indication that the device has entered the sleep mode.
FIGURE 12. INFRARED TRANSMIT DATA ENCODING AND RECEIVE DATA DECODING
Character
Data Bits
S
ta
rt
S
to
p
0
1
Bit Time
1/16 Clock Delay
IRdecoder-1
RX Data
Receive
IR Pulse
(RX pin)
C h a ra cte r
D a ta B its
S
ta
rt
S
to
p
0
1
T X D a ta
T ra n sm it
IR P u lse
(T X P in )
B it T im e
1 /2 B it T im e
3 /1 6 B it T im e
IrE n co d e r-1
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