参数资料
| 型号： | XR16C864CQ-F |
| 厂商： | Exar Corporation |
| 文件页数： | 45/51页 |
| 文件大小： | 0K |
| 描述： | IC UART FIFO 128B QUAD 100QFP |
| 标准包装： | 66 |
| 特点： | * |
| 通道数： | 4，QUART |
| FIFO's： | 128 字节 |
| 规程： | RS232，RS485 |
| 电源电压： | 2.97 V ~ 5.5 V |
| 带自动流量控制功能： | 是 |
| 带IrDA 编码器/解码器： | 是 |
| 带故障启动位检测功能： | 是 |
| 带调制解调器控制功能： | 是 |
| 带CMOS： | 是 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-BQFP |
| 供应商设备封装： | 100-QFP（14x20） |
| 包装： | 托盘 |
| 其它名称： | 1016-1449 1016-1449-ND 1016-1651 XR16C864CQ-F-ND |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页当前第45页第46页第47页第48页第49页第50页第51页
XR16C864
5
REV. 2.2.0
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
FSRS#
76
I
FIFO Status Register Select (active low input with internal pull-up).
The content of the FSTAT register is placed on the data bus when this pin becomes
active. However it should be noted, D0-D3 contain the inverted logic states of TXRDY#
A-D pins, and D4-D7 the logic states (un-inverted) of RXRDY# A-D pins. Address line is
not required when reading this status register.
DIRECT MEMORY ACCESS INTERFACE
TC
54
I
Direct Memory Access Terminal Count. A high pulse terminates a Direct Memory Access
transaction. If Direct Memory Access is not used, this input should be connected to GND.
AEN
27
I
Address Enable for Direct Memory Access. A high at this input indicates a valid Direct
Memory Access cycle. See DACK pin descriptions below for Direct Memory Access cycle
description. If Direct Memory Access is not used, this input should be connected to GND.
DACKA
DACKB
DACKC
DACKD
4
26
55
77
I
Direct Memory Access Acknowledge. Direct Memory Access cycle will start processing
when CPU/Host sets this input low and AEN high. All writes will be to the TX FIFO and all
reads will be from the RX FIFO. A0-A2 and CS# A-D will be ignored. If Direct Memory
Access is not used, these inputs should be connected to VCC.
TXDRQA
TXDRQB
TXDRQC
TXDRQD
5
25
56
81
O
Transmit Direct Memory Access Request. A transmit empty request is indicated by a high
level on TXDRQ. The TXDRQ line is held high until either TC pulses or the TX FIFO is
filled above its trigger level. Transmit Direct Memory Access Request is enabled by set-
ting EMSR register bit-2 = 1. If Direct Memory Access is not used, leave these outputs
unconnected.
RXDRQA
RXDRQB
RXDRQC
RXDRQD
100
31
50
82
O
Receive Direct Memory Access Request. A Receive ready request is indicated by a high
level on RXDRQ. The RXDRQ line is held high until either TC pulses or the RX FIFO is
emptied. Receive Direct Memory Access Request is enabled by setting EMSR register
bit-3 = 1. If Direct Memory Access is not used, leave these outputs unconnected.
MODEM OR SERIAL I/O INTERFACE
TXA
TXB
TXC
TXD
14
16
65
67
O
UART channels A-D Transmit Data and infrared transmit data. Standard transmit and
receive interface is enabled when MCR[6] = 0. In this mode, the TX signal will be a logic
1 during reset, or idle (no data). Infrared IrDA transmit and receive interface is enabled
when MCR[6] = 1. In the Infrared mode, the inactive state (no data) for the Infrared
encoder/decoder interface is a logic 0.
IRTXA
IRTXB
IRTXC
IRTXD
6
24
57
75
O
UART channels A-D Infrared Transmit Data. The inactive state (no data) for the Infrared
encoder/decoder interface is a logic 0. Regardless of the logic state of MCR bit-6, this pin
will be operating in the Infrared mode.
RXA
RXB
RXC
RXD
97
34
47
85
I
UART channels A-D Receive Data or infrared receive data. Normal receive data input
must idle at logic 1 condition. The infrared receiver pulses typically idles at logic 0 but can
be inverted by software control prior going in to the decoder, see FCTR[2].
RTSA#
RTSB#
RTSC#
RTSD#
11
19
62
70
O
UART channels A-D Request-to-Send (active low) or general purpose output. This output
must be asserted prior to using auto RTS flow control, see EFR[6], MCR[1], FCTR[1:0],
EMSR[5:4] and IER[6]. Also see
Figure 10. If these outputs are not used, leave them
unconnected.
Pin Description
NAME
100-QFP
PIN #
TYPE
DESCRIPTION
相关PDF资料 |
PDF描述 |
|---|---|
| XR17D154IV-F | IC UART PCI BUS QUAD 144LQFP |
| XR16C854IV-F | IC UART FIFO 128B QUAD 64LQFP |
| XR16C854DIV-F | IC UART FIFO 128B QUAD 64LQFP |
| XR16C854CQ-F | IC UART FIFO 128B QUAD 100QFP |
| XR16L784CV-F | IC UART 8B 3.3V QUAD 64LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XR16C864CQTR-F | 功能描述:UART 接口集成电路 UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| XR16C864IQ | 制造商:EXAR 制造商全称:EXAR 功能描述:2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO |
| XR16C864IQ-F | 功能描述:UART 接口集成电路 UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| XR16C864IQTR-F | 功能描述:UART 接口集成电路 UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| XR16C872 | 制造商:EXAR 制造商全称:EXAR 功能描述:DUAL UART WITH 1284 PARALLEL PORT AND PLUG-AND-PLAY CONTROLLER |
发布紧急采购，3分钟左右您将得到回复。