参数资料
型号: XR16M780IL32-F
厂商: Exar Corporation
文件页数: 32/58页
文件大小: 0K
描述: IC UART FIFO 64B 32QFN
标准包装: 490
特点: *
通道数: 1,UART
FIFO's: 64 字节
规程: RS232,RS422,RS485
电源电压: 1.62 V ~ 3.63 V
带自动流量控制功能:
带IrDA 编码器/解码器:
带故障启动位检测功能:
带调制解调器控制功能:
带CMOS:
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-QFN 裸露焊盘(5x5)
包装: 托盘
XR16M780
38
1.62V TO 3.63V HIGH PERFORMANCE UART WITH 64-BYTE FIFO
REV. 1.0.0
4.12
Enhanced Mode Select Register (EMSR) - Write-only
This register replaces SPR (during a Write) and is accessible only when FCTR[6] = 1.
EMSR[1:0]: Receive/Transmit FIFO Level Count
When Scratchpad Swap (FCTR[6]) is asserted, EMSR bits 1-0 controls what mode the FIFO Level Counter is
operating in.
During Alternate RX/TX FIFO Level Counter Mode, the first value read after EMSR bits 1-0 have been
asserted will always be the RX FIFO Level Counter. The second value read will correspond with the TX FIFO
Level Counter. The next value will be the RX FIFO Level Counter again, then the TX FIFO Level Counter and
so on and so forth.
EMSR[2]: Send TX Immediately
Logic 0 = Do not send TX immediately (default).
Logic 1 = Send TX immediately. When FIFO is enabled and this bit is set, the next data will be written to the
TX shift register. Thus, the data will be sent out immediately instead of queuing in the FIFO. Every time, only
1 byte will be send out. Once this byte has been sent out, the EMSR[2] will go back to 0 automatically. If
more than 1 byte will be sent out, EMSR[2] needs to be set to 1 for each byte.
EMSR[3]: Invert RTS in RS485 mode
Logic 0 = RTS# output is a logic 0 during TX and a logic 1 during RX (default).
Logic 1 = RTS# output is a logic 1 during TX and a logic 0 during RX.
TABLE 12: SCRATCHPAD SWAP SELECTION
FCTR[6] EMSR[1]
EMSR[0] Scratchpad is
0
X
Scratchpad
1
X
0
RX FIFO Level Counter Mode
1
0
1
TX FIFO Level Counter Mode
1
Alternate RX/TX FIFO Counter Mode
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