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| 型号： | XR16V564IL-F |
| 厂商： | Exar Corporation |
| 文件页数： | 10/54页 |
| 文件大小： | 0K |
| 描述： | IC UART FIFO 32B QUAD 48QFN |
| 标准包装： | 260 |
| 特点： | * |
| 通道数： | 4，QUART |
| FIFO's： | 32 字节 |
| 规程： | RS232 |
| 电源电压： | 2.25 V ~ 3.6 V |
| 带自动流量控制功能： | 是 |
| 带IrDA 编码器/解码器： | 是 |
| 带故障启动位检测功能： | 是 |
| 带调制解调器控制功能： | 是 |
| 带CMOS： | 是 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN-EP（7x7） |
| 包装： | 托盘 |
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FIGURE 10. RECEIVER OPERATION IN FIFO AND AUTO RTS FLOW CONTROL MODE
Receive Data Shift
R egister (RSR)
R XFIFO 1
16X or 8X or 4X Clock
( DLD[5:4] )
Err
or
T
a
gs
(32
-se
ts
)
Er
ro
rT
ag
si
n
LS
R
b
its
4:
2
R eceive D ata Characters
Data Bit
Validation
Receive
Data FIFO
Receive
Data
Receive Data
Byte and Errors
RH R Interrupt (ISR bit-2) program m ed for
desired FIFO trigger level.
FIFO is Enabled by FCR bit-0=1
R TS# de-asserts when data fills above the flow
control trigger level to suspend rem ote transm itter.
Enable by EFR bit-6=1, M C R bit-1.
R TS# re-asserts when data falls below the flow
control trigger level to restart rem ote transm itter.
Enable by EFR bit-6=1, M CR bit-1.
32 bytes by 11-bit wide
FIFO
Trigger=16
D ata falls to
8
D ata fills to
24
Exam ple
: - R X FIFO trigger level selected at 16 bytes
(See N ote Below )
XR16V564/564D
18
2.25V TO 3.6V QUAD UART WITH 32-BYTE FIFO
REV. 1.0.4
2.11
Auto RTS (Hardware) Flow Control
Automatic RTS hardware flow control is used to prevent data overrun to the local receiver FIFO. The RTS#
output is used to request remote unit to suspend/resume data transmission. The auto RTS flow control
features is enabled to fit specific application requirement (see Figure 11):
Enable auto RTS flow control using EFR bit-6.
The auto RTS function must be started by asserting RTS# output pin (MCR bit-1 to logic 1 after it is enabled).
If using the Auto RTS interrupt:
Enable RTS interrupt through IER bit-6 (after setting EFR bit-4). The UART issues an interrupt when the RTS#
pin makes a transition from low to high: ISR bit-5 will be set to logic 1.
2.12
Auto RTS Hysteresis
The V564 has a new feature that provides flow control trigger hysteresis while maintaining compatibility with
the XR16C850, ST16C650A and ST16C550 family of UARTs. With the Auto RTS function enabled, an interrupt
is generated when the receive FIFO reaches the selected RX trigger level. The RTS# pin will not be forced
HIGH (RTS off) until the receive FIFO reaches one trigger level above the selected trigger level in the trigger
table (Table 12). The RTS# pin will return LOW after the RX FIFO is unloaded to one level below the selected
trigger level. Under the above described conditions, the V564 will continue to accept data until the receive
FIFO gets full. The Auto RTS function is initiated when the RTS# output pin is asserted LOW (RTS On).
TABLE 7: AUTO RTS (HARDWARE) FLOW CONTROL
RX TRIGGER LEVEL
INT PIN ACTIVATION
RTS# DE-ASSERTED (HIGH)
(CHARACTERS IN RX FIFO)
RTS# ASSERTED (LOW)
(CHARACTERS IN RX FIFO)
8
16
0
16
24
8
24
30
16
30
24
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XR16V564IV | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| XR16V564IV-0A-EVB | 功能描述:UART 接口集成电路 Supports V564 64 ld LQFP, ISA Interface RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| XR16V564IV80 | 制造商:EXAR 制造商全称:EXAR 功能描述:2.25V TO 3.6V QUAD UART WITH 32-BYTE FIFO |
| XR16V564IV80-0A-EB | 功能描述:UART 接口集成电路 Supports V564 80 ld LQFP, ISA Interface RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| XR16V564IV80-F | 功能描述:UART 接口集成电路 UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
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