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参数资料
| 型号： | XR17V252IM-F |
| 厂商： | Exar Corporation |
| 文件页数： | 4/69页 |
| 文件大小： | 0K |
| 描述： | IC UART PCI BUS DUAL 100TQFP |
| 标准包装： | 90 |
| 特点： | * |
| 通道数： | 2，DUART |
| FIFO's： | 64 字节 |
| 规程： | RS485 |
| 电源电压： | 3.3V，5V |
| 带自动流量控制功能： | 是 |
| 带IrDA 编码器/解码器： | 是 |
| 带故障启动位检测功能： | 是 |
| 带调制解调器控制功能： | 是 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-TQFP |
| 供应商设备封装： | 100-TQFP（14x14） |
| 包装： | 托盘 |
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XR17V252
12
66 MHZ PCI BUS DUAL UART WITH POWER MANAGEMENT SUPPORT
REV. 1.0.2
1.4
EEPROM Interface
The V252 provides an interface to an Electrically Erasable Programmable Read Only Memory (EEPROM). The
EEPROM must be a 93C46-like device, with its memory configured as 16-bit words. This interface is provided
in order to program the registers in the PCI Configuration Space of the PCI UART during power-up. The
following table gives the mapping of the EEPROM memory to the registers in the V252’s PCI Configuration
Space. When the PCI RST# is negated, the V252 will download the data from the EEPROM, if it detects a
HIGH on the EECS pin. The V252 takes a maximum of 216 PCI clocks from the rising edge of the PCI RST#
signal to read the EEPROM data. For more details on the EEPROM interface, please refer to the application
note DAN112 on Exar’s website.
NOTE: * Only the upper 8 bits in this word in EEPROM location are used and the lower 8 bits are ignored. The lower byte at
PCI Config space 0x08 is Device Revision and is read-only.
1.5
Device Internal Register Sets
The Device Configuration Registers and the two individual UART Configuration Registers of the V252
occupy 2K of PCI bus memory address space. These addresses are offset onto the basic memory address, a
value loaded into the Memory Base Address Register (BAR) in the PCI local bus configuration register set. The
UART Configuration Registers are mapped into 4 address blocks where each UART channel occupies 512
bytes memory space for its own registers that include the 16550 compatible registers. The Device
Configuration Registers are embedded inside the UART channel zero’s address space between 0x0080 to
0x0093. All these registers can be accessed in 8, 16, 24 or 32 bits width depending on the starting address
given by the host at beginning of the bus cycle. Transmit and receive data may be loaded or unloaded in 8, 16,
24 or 32 bits format in special locations given in the Table 5 below. Every time a read or write operation is
made to the transmit or receive register, its FIFO data pointer is automatically bumped to the next sequential
data location either in byte, word or dword. One special case applies to the receive data unloading when
reading the receive data together with its LSR register content. The host must read them in 16 or 32 bits format
in order to maintain integrity of the data byte with its associated error flags. These special registers are further
TABLE 4: EEPROM ADDRESS DEFINITIONS
EEPROM MEMORY
ADDRESS
EEPROM DATA [D15:D0]
V252’S PCI CONFIGURATION
SPACE ADDRESS
(WORD OFFSET)
DEFAULT VALUES
0x00
Vendor ID
0x00
0x13A8
0x01
Device ID
0x02
0x0252
0x02
Class Code*
0x08
0x0200
0x03
Class Code (Continued)
0x0A
0x0700
0x04
Subsystem Vendor ID
0x2C
0x0000
0x05
Subsystem ID
0x2E
0x0000
0x06
Special Register (Lower Word)
0x48
0x0000
0x07
Special Register (Upper Word)
0x4A
0x0000
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XR17V252IMTR-F | 制造商:Exar Corporation 功能描述:UART 2-CH 64Byte FIFO 3.3V 100-Pin TQFP T/R 制造商:Exar Corporation 功能描述:XR17V252IMTR-F |
| XR17V254 | 制造商:EXAR 制造商全称:EXAR 功能描述:66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT |
| XR17V254_08 | 制造商:EXAR 制造商全称:EXAR 功能描述:66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT |
| XR17V254IV | 制造商:EXAR 制造商全称:EXAR 功能描述:66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT |
| XR17V254IV-0A-EVB | 功能描述:UART 接口集成电路 Supports V254 144 ld LQFP,PCI Interface RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
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