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参数资料
| 型号： | XR17V354IB-0A-EVB |
| 厂商： | Exar Corporation |
| 文件页数： | 54/66页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR XR17V354-A 176BGA |
| 产品培训模块： | PCIe UARTs |
| 标准包装： | 1 |
| 主要目的： | 接口，UART |
| 嵌入式： | 否 |
| 已用 IC / 零件： | XR17V354 |
| 已供物品： | 板 |
| 其它名称： | 1016-1611 XR17V354IB-0A-EVB-ND |
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XR17V354
58
HIGH PERFORMANCE QUAD PCI-EXPRESS UART
REV. 1.0.3
MSR [2]: Receiver Disable
This bit can be used to disable the receiver by halting the Receive Shift Register (RSR). When this bit is set to
a logic 1, the receiver will operate in one of the following ways:
■
If a character is being received at the time of setting this bit, that character will be correctly received. No
more characters will be received.
■
If the receiver is idle at the time of setting this bit, no more characters will be received.
The receiver can be enabled and will start receiving characters by resetting this bit to a logic 0. The receiver
will operate in one of the following ways:
■
If the receiver is idle (RX pin is HIGH) at the time of setting this bit, the next character will be received
normally. It is recommended that the receiver be idle when resetting this bit to a logic 0.
■
If the receiver is not idle (RX pin is toggling) at the time of setting this bit, the RX FIFO will be filled with
unknown data.
Any data that is in the RX FIFO can be read out at any time whether the receiver is disabled or not.
Logic 0 = Enable Receiver (default).
Logic 1 = Disable Receiver.
MSR [1]: Transmitter Disable Modes
This bit is only applicable when MSR[3] = 1.
Logic 0 = No xon/xoff software flow control characters will be transmitted when the transmitter is disabled. If
there is a pending xon/xoff character to be sent while the transmitter is disabled, it will be transmitted. No
additional xon/xoff characters will be sent.
Logic 1 = Xon/xoff software flow control characters will be transmitted even though the transmitter is
disabled.
MSR[0]: Receiver Disable Modes
This is only applicable when MSR[2] = 1.
Logic 0 = All RX data and xon/xoff flow control characters are ignored.
Logic 1 = All RX data is ignored. Xon/xoff flow control characters are detected and acted upon.
4.12
SCRATCH PAD REGISTER (SPR) - Read/Write
This is a 8-bit general purpose register for the user to store temporary data. The content of this register is
preserved during sleep mode but becomes 0xFF (default) after a reset or a power off-on cycle.
4.13
FEATURE CONTROL REGISTER (FCTR) - Read/Write
This register controls the UART enhanced functions that are not available on ST16C554 or ST16C654.
FCTR[7:6]: TX and RX FIFO Trigger Table Select
These 2 bits select the transmit and receive FIFO trigger level table A, B, C or D. When table A, B, or C is
selected the auto RTS flow control trigger level is set to "next FIFO trigger level" for compatibility to ST16C550
and ST16C650 series. RTS/DTR# triggers on the next level of the RX FIFO trigger level, in another word, one
FIFO level above and one FIFO level below. See in Table 16 for complete selection with FCR bit [5:4] and
FCTR bits [7:6], i.e. if Table C is used on the receiver with RX FIFO trigger level set to 56 bytes, RTS/DTR#
output will de-assert at 60 and re-assert at 16.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XR17V354IB176-F | 功能描述:UART 接口集成电路 4 Channel PCIe UART w/256 Byte FIFO RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| XR17V354IB-E4-EVB | 功能描述:界面开发工具 Eval Board for XR17V354IB-E4 RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| XR17V354IB-E8-EVB | 功能描述:界面开发工具 Eval Board for XR17V354IB-E8 RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| XR17V358 | 制造商:EXAR 制造商全称:EXAR 功能描述:HIGH PERFORMANCE OCTAL PCI EXPRESS UART |
| XR17V358IB-0A-EVB | 功能描述:界面开发工具 Eval Board for XR17V358IB-0A RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
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