- 您现在的位置：买卖IC网 > PDF目录16841 > XR20M1170L16-0A-EB (Exar Corporation)EVAL BOARD FOR XR20M1170 16QFN PDF资料下载
参数资料
| 型号： | XR20M1170L16-0A-EB |
| 厂商： | Exar Corporation |
| 文件页数： | 22/56页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR XR20M1170 16QFN |
| 标准包装： | 1 |
| 主要目的： | 接口，UART |
| 嵌入式： | 否 |
| 已用 IC / 零件： | XR20M1170 |
| 次要属性： | I²C & SPI 接口 |
| 已供物品： | 板 |
| 其它名称： | 1016-1618 XR20M1170L16-0A-EB-ND |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页当前第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页
XR20M1170
29
REV. 1.1.0
I2C/SPI UART WITH 64-BYTE FIFO
FCR[1]: RX FIFO Reset
This bit is only active when FCR bit-0 is a ‘1’ and requires at least 3 XTAL clocks to reset.
Logic 0 = No receive FIFO reset (default)
Logic 1 = Reset the receive FIFO pointers and FIFO level counter logic (the receive shift register is not
cleared or altered). This bit will return to a logic 0 after resetting the FIFO.
FCR[2]: TX FIFO Reset
This bit is only active when FCR bit-0 is a ‘1’ and requires at least 3 XTAL clocks to reset.
Logic 0 = No transmit FIFO reset (default).
Logic 1 = Reset the transmit FIFO pointers and FIFO level counter logic (the transmit shift register is not
cleared or altered). This bit will return to a logic 0 after resetting the FIFO.
FCR[3]: Reserved
This is a legacy register bit that does not have any functionality in the XR20M1170.
FCR[5:4]: Transmit FIFO Trigger Select (requires EFR bit-4=1)
(logic 0 = default, TX trigger level = 1)
These 2 bits set the trigger level for the transmit FIFO. The UART will issue a transmit interrupt when the
number of spaces in the FIFO is above the selected trigger level, or when it gets empty in case that the FIFO
did not get filled over the trigger level on last re-load. Table 10 shows the selections. The UART will issue a
transmit interrupt when the number of available spaces in the FIFO is less than the transmit trigger level.
Table 10 shows the selections.
FCR[7:6]: Receive FIFO Trigger Select
(logic 0 = default, RX trigger level =1)
These 2 bits are used to set the trigger level for the receive FIFO. The UART will issue a receive interrupt when
the number of the characters in the FIFO is greater than the receive trigger level or when a receive data
timeout occurs (see “Section 2.8, Receiver” on page 15).
TABLE 10: TRANSMIT AND RECEIVE FIFO TRIGGER LEVEL SELECTION
BIT-7
BIT-6
BIT-5
BIT
-4
RECEIVE
TRIGGER LEVEL
(CHARACTERS)
TRANSMIT
TRIGGER LEVEL
(SPACES)
0
1
0
1
0
1
0
1
0
1
0
1
8
16
56
60
8
16
32
56
FCR
相关PDF资料 |
PDF描述 |
|---|---|
| GBM12DSAI | CONN EDGECARD 24POS R/A .156 SLD |
| 202F253-51/164-0 | BOOT MOLDED |
| RPP30-2424S-1F | CONV DC/DC 30W 18-36VIN 24VOUT |
| MLF2012A3R9J | INDUCTOR MULTILAYER 3.9UH 0805 |
| RPP30-2424S-1 | CONV DC/DC 30W 18-36VIN 24VOUT |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XR20M1170L16-0B-EB | 功能描述:UART 接口集成电路 Supports M1170 16pin QFN, SPI Interface RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| XR20M1170L24-0A-EB | 功能描述:UART 接口集成电路 Supports M1170 24pin QFN, I2C Interface RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| XR20M1170L24-0B-EB | 功能描述:UART 接口集成电路 Supports M1170 28pin QFN, SPI Interface RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| XR20M1170L28-0A-EB | 功能描述:UART 接口集成电路 Supports M1170 28pin QFN, I2C Interface RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| XR20M1170L28-0B-EB | 功能描述:界面开发工具 Supports M1170 28pin QFN, SPI Interface RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
发布紧急采购，3分钟左右您将得到回复。