参数资料
型号: XRD8785AIDTR-F
厂商: Exar Corporation
文件页数: 12/15页
文件大小: 0K
描述: IC ADC 8BIT 20MSPS 24SOIC
产品变化通告: Packaging Change 15/Jul/2010
标准包装: 1,500
位数: 8
采样率(每秒): 20M
数据接口: 并联
转换器数目: 1
功率耗散(最大): 675mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SOIC(0.295",7.50mm 宽)
供应商设备封装: 24-SOIC
包装: 带卷 (TR)
输入数目和类型: *
XRD8785
6
Rev. 3.00
Figure 5. Equivalent Input Circuit
Figure 6. Typical Circuit Connections
APPLICATION NOTES
Signals should not exceed V
DD +0.5V or go below GND
–0.5V. All pins have internal protection diodes that will
protect them from short transients (<100
s) outside
the supply range.
AGND and DGND pins are connected internally
through the P-substrate. DC voltage differences be-
tween GND pins will cause undesirable internal sub-
strate currents.
The power supply (V
DD) and reference voltage (VRT &
V
RB) pins should be decoupled with 0.1F and 10F
capacitors to AGND, placed as close to the chip as
possible.
The digital outputs should not drive long wires or buses.
The capacitive coupling and reflections will contribute
noise to the conversion.
To avoid timing errors, use the rising edge of the sample
clock (CLK) to latch data from the XRD8785 to other
parts of the system.
The reference can be biased internally by shorting V
RT
to V
RTS and VRB to VRBS. This will generate 0.6V at VRB
and 2.6V at V
RT (see Figure 5).
If the internal reference pins V
RTS and/or VRBS are not
used, they should be left unconnected.
The output enable pin (OE) should not be left uncon-
nected. If not controlled by an active signal then it must
be tied to a logic low value.
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