参数资料
型号: XRP6142EVB
厂商: Exar Corporation
文件页数: 10/17页
文件大小: 0K
描述: EVAL BOARD FOR XRP6142
特色产品: XRP6142 Synchronous Step-Down Controllers
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 1,非隔离
输出电压: 2.5V
电流 - 输出: 15A
输入电压: 3.3 ~ 5.5 V
稳压器拓扑结构: 降压
板类型: 完全填充
已供物品:
已用 IC / 零件: XRP6142
相关产品: 1016-1333-ND - IC CTRLR STEP-DWN SYNC 16QFN
1016-1332-ND - IC CTRLR STEP-DWN SYNC 16QFN
1016-1331-ND - IC CTRLR STEP-DWN SYNC 16QFN
其它名称: 1016-1334
X R P 6 1 4 2
S y n c h r o n o u s S t e p - D o w n C o n t r o l l e r w i t h D D R
M e m o r y T e r m i n a t i o n
I 2 ? I 1
voltage ripple for regulating the output. To
ensure stable operation two constraints must
be met:
C OUT ≥
2 2
Vos 2 ? V OUT
2
ESR ≥
( V IN ? V OUT ) × D
CFF =
ESR ≥
First the C OUT must have sufficient ESR in
order to get enough voltage ripple at feedback
pin. It is recommended that XRP6142 be
operated with at least 25mV ripple at feedback
pin. Assuming majority of output voltage
ripple is from ESR, we get:
25 mV
Δ IL …………. (1)
Where ? IL is inductor current ripple nominally
set at 30% of I OUT .
Note that V OUT ripple, is attenuated by the
resistor divider R1/R2, and a smaller ripple is
seen at FB pin. For example if V OUT ripple is
25mV and R1=R2=10k, then the voltage
ripple at FB is only 12.5mV. One solution to
this problem is to increase the output ripple
accordingly, such that ripple at FB is 25mV. A
more desirable solution is to provide a high-
frequency/low-impedance path for the output
ripple to be transmitted to FB without
attenuation. This can be done by placing a
small feed-forward capacitor CFF in parallel
with R1. As a starting point calculate CFF
from:
10
2 × π × R 1 × fs
Where fs is the switching frequency
In general, a CFF of 1nF should provide
satisfactory feed-forward for most applications
based on the XRP6142.
The second constraint for stability establishes
a relation between ESR and C OUT .
Ton
C OUT …………. (2)
Once ESR is calculated from equation (1),
equation (2) can be used to calculate C OUT .
The aforementioned are in addition to the
usual requirements for C OUT for a buck
converter. The usual constraint in order to
meet load step transient requirement is given
by:
Where:
I 2 is load step high-level current
I 1 is load step low-level current
V OUT is output voltage including transient
(nominally this is set 3% higher than V OUT )
In general, the best capacitors are the ones
with known and consistent ESR across
operating temperature range. Examples
include POSCAPs, Tantalums and certain
Aluminum Electrolytics.
O UTPUT I NDUCTOR
Select the output inductor for inductance and
current rating. As a rule of thumb the DC
current rating and saturation current should
be at least 50% higher than maximum output
current. Calculate the inductance from:
L =
Δ IL × fs
Where:
D is duty cycle
fs is switching frequency
? IL is inductor current ripple nominally set at
30% of I OUT .
I NPUT C APACITOR
Select the input capacitor for capacitance,
voltage rating and RMS current rating. As a
rule of thumb, the voltage rating should be
twice the maximum input voltage of the
converter. RMS current rating can be
approximated from:
I RMS = I OUT × D ( 1 ? D )
Calculate C IN such that input voltage ripple
does not exceed 2% of V IN . Ceramic input
capacitors are recommended. This choice
minimizes input voltage ripple due to ESL and
ESR. Thus a simplified expression for C IN can
be written:
? 2010 Exar Corporation
Page 10 of 17
Rev. 1.0.0
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