参数资料
型号: XRT73R12IB-L
厂商: Exar Corporation
文件页数: 72/89页
文件大小: 0K
描述: IC LIU E3/DS3/STS-1 12CH 420TBGA
标准包装: 40
类型: 线路接口装置(LIU)
驱动器/接收器数: 12/12
规程: DS3,E3,STS-1
电源电压: 3.135 V ~ 3.465 V
安装类型: 表面贴装
封装/外壳: 420-LBGA 裸露焊盘
供应商设备封装: 420-TBGA(35x35)
包装: 托盘
XRT73R12
71
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.0.3
5
Digital LOS Defect
Declared
R/O
Digital LOS Defect Declared:
This READ-ONLY bit-field indicates whether or not the Digital LOS (Loss of
Signal) detector is declaring the LOS Defect condition.
For DS3 and STS-1 applications, the Digital LOS Detector will declare the
LOS Defect condition whenever it detects an absence of pulses (within the
incoming DS3 or STS-1 data-stream) for 160 consecutive bit-periods.
Further, (again for DS3 and STS-1 applications) the Digital LOS Detector will
clear the LOS Defect condition whenever it determines that the pulse den-
sity (within the incoming DS3 or STS-1 signal) is at least 33%.
0 - Indicates that the Digital LOS Detector is NOT declaring the LOS Defect
Condition.
1 - Indicates that the Digital LOS Detector is currently declaring the LOS
Defect condition.
NOTES:
1.
LOS Detection (within each channel of the XRT73R12) is
performed by both an Analog LOS Detector and a Digital LOS
Detector. The LOS state of a given Channel is simply a WIRED-
OR of the LOS Defect Declare states of these two detectors.
2.
The current LOS Defect Condition (for the channel) can be
determined by reading out the contents of Bit 1 (Receive LOS
Defect Declared) within this register.
4
Analog LOS Defect
Declared
R/O
Analog LOS Defect Declared:
This READ-ONLY bit-field indicates whether or not the Analog LOS (Loss of
Signal) detector is declaring the LOS Defect condition.
For DS3 and STS-1 applications, the Analog LOS Detector will declare the
LOS Defect condition whenever it determines that the amplitude of the
pulses (within the incoming DS3/STS-1 line signal) drops below a certain
Analog LOS Defect Declaration threshold level.
Conversely, (again for DS3 and STS-1 applications) the Analog LOS Detec-
tor will clear the LOS Defect condition whenever it determines that the
amplitude of the pulses (within the incoming DS3/STS-1 line signal) has
risen above a certain Analog LOS Defect Clearance threshold level.
It should be noted that, in order to prevent "chattering" within the Analog
LOS Detector output, there is some built-in hysteresis between the Analog
LOS Defect Declaration and the Analog LOS Defect Clearance threshold
levels.
0 - Indicates that the Analog LOS Detector is NOT declaring the LOS Defect
Condition.
1 - Indicates that the Analog LOS Detector is currently declaring the LOS
Defect condition.
NOTES:
1.
LOS Detection (within each channel of the XRT73R12) is
performed by both an Analog LOS Detector and a Digital LOS
Detector. The LOS state of a given Channel is simply a WIRED-
OR of the LOS Defect Declare states of these two detectors.
2.
The current LOS Defect Condition (for the channel) can be
determined by reading out the contents of Bit 1 (Receive LOS
Defect Declared) within this register.
3
Reserved
TABLE 33: ALARM STATUS REGISTER - CHANNEL N ADDRESS LOCATION = 0XM3
(N = [0:11] & M= 0-5 & 8-D)
BIT NUMBER
NAME
TYPE
DESCRIPTION
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