参数资料
| 型号： | XRT75L02IVTR-F |
| 厂商： | Exar Corporation |
| 文件页数： | 35/50页 |
| 文件大小： | 0K |
| 描述： | IC LIU E3/DS3/STS-1 2CH 100TQFP |
| 标准包装： | 1,000 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 2/2 |
| 规程： | DS3，E3，STS-1 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-LQFP |
| 供应商设备封装： | 100-TQFP（14x14） |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页当前第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页
xr
XRT75L02
REV. 1.0.3
TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
38
TABLE 19: REGISTER MAP DESCRIPTION - CHANNEL 0
ADDRESS
(HEX)
TYPE
REGISTER
NAME
BIT#
SYMBOL
DESCRIPTION
DEFAULT
VALUE
0x01 (ch 0)
0x09 (ch 1)
R/W
Interrupt
Enable
(source
level)
D0
DMOIE_n
Writing a “1” to this bit enables an interrupt when the
no transmission detected on channel output.
0
D1
RLOSIE_n Writing a “1” to this bit enables an interrupt when
Receive Los of Signal is detected.
0
D2
RLOLIE_n
Writing a “1” to this bit enables an interrupt when
Receive Loss of Lock condition is detected
0
D3
FLIE_n
Writing a “1” to this bit enables the interrupt when
the FIFO Limit of the Jitter Attenuator is within 2 bits
of overflow/underflow condition.
NOTE:
This bit field is ignored when the Jitter
Attenuator is disabled.
0
D7-D4
Reserved
0x02 (ch 0)
0x0A (ch 1)
Reset
on
Read
Interrupt
Status
(source
level)
D0
DMOIS_n
This bit is set every time a DMO status change has
occurred since the last cleared interrupt.This bit is
cleared when the register bit is read.
0
D1
RLOSIS_n This bit is set every time a RLOS status change has
occurred since the last cleared interrupt. This bit is
cleared when the register bit is read.
0
D2
RLOLIS_n
This bit is set every time a RLOL status change has
occurred since the last cleared interrupt. This bit is
cleared when the register bit is read.
0
D3
FLIS_n
This bit is set every time a FIFO Limit status change
has occurred since the last cleared interrupt. This bit
is cleared when the register bit is read.
0
D7-D4
Reserved
0x03 (ch 0)
0x0B (ch 1)
Read
Only
Alarm Sta-
tus
D0
DMO_n
This bit is set every time the MTIP_0/MRing_0 input
pins have not detected any bipolar pulses for 128
consecutive bit periods.
0
D1
RLOS_n
This bit is set every time the receiver declares an
LOS condition.
0
D2
RLOL_n
This bit is set every time when the receiver declares
a Loss of Lock condition.
0
D3
FL_n
This bit is set every time the FIFO in the Jitter Atten-
uator is within 2 bit of underflow/overflow condition.
0
D4
ALOS_n
This bit is set every time the receiver declares Ana-
log LOS condition.
0
D5
DLOS_n
This bit is set every time the receiver declares Digi-
tal LOS condition.
0
D6
PRBSLS_n This bit is set every time the PRBS detector is not in
sync.
0
D7
Reserved
相关PDF资料 |
PDF描述 |
|---|---|
| IDT723631L20PFI8 | IC FIFO SYNC 512X36 120-TQFP |
| ISL26313FBZ | IC ADC 12BIT SPI/SRL 125K 8SOIC |
| IDT723643L15PF8 | IC FIFO SYNC 1024X36 128QFP |
| XRT83SL38IB | IC LIU SH T1/E1/J1 OCTAL 225BGA |
| MS27472T10B35SC | CONN RCPT 13POS WALL MNT W/SCKT |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XRT75L03 | 制造商:EXAR 制造商全称:EXAR 功能描述:THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75L03D | 制造商:EXAR 制造商全称:EXAR 功能描述:THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
| XRT75L03DES | 功能描述:时钟合成器/抖动清除器 3 CH T3/E3/STS1 LIU+DESYNCH3.3V RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| XRT75L03DIV | 功能描述:外围驱动器与原件 - PCI 3CHNNEL E3/DS3/STS 1 SONET DE-SYNCH RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| XRT75L03DIV-F | 功能描述:外围驱动器与原件 - PCI 3-Ch DS3, E3, STS-1 RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
发布紧急采购，3分钟左右您将得到回复。