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参数资料
| 型号： | YMF743 |
| 厂商： | Yamaha Corporation |
| 元件分类： | Codec |
| 英文描述： | AC97 Revsion2.1 Audio CODEC with Digital Audio I/F(AC97 2.1版音频编解码器（带数字音频接口）) |
| 中文描述： | AC97 Revsion2.1音频编解码器和数字音频I / F（AC97 2.1版音频编解码器（带数字音频接口）） |
| 文件页数： | 5/24页 |
| 文件大小： | 160K |
| 代理商： | YMF743 |
YMF743
February 17, 2000
13
64h : ZV Port Volume (Read/Write, Default: 8848h or C848h)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Mute MSEL
-
GL4-0
ZEN
ZAC
-
GR4-0
Mute..............Setting this bit to “1” mutes both left and right channels of the ZV port.
MSEL ...........This bit is read only, and indicates the status of No.40 MSEL pin.
“0” : Low
“1” : High
GL4-0 ...........These bits determine the volume level of the ZV port left channel by 1.5dB step. The volume
range is from +12dB to -34.5dB. When all bits are set to “0”, volume is maximum (+12dB) and
when all bits are set to “1”, volume is minimum (-34.5dB).
ZEN ..............This bit selects whether ZV port is used or not.
“0” : ZV port is power down state, and can not be used.
“1” : ZV port can be used.
ZAC ..............This bit is read only, and indicates whether the bit clock (ZV_BCK) is input to ZV port or not.
“0” : The bit clock (ZV_BCK) is not input.
“1” : ZV port is active because the bit clock (ZV_BCK) is input.
GR4-0 ...........These bits determine the volume level of the ZV port right channel by 1.5dB step.
Setting to them is the same as the upper GL4-0 bits.
66h : DIT Control (Read/Write, Default: 0000h)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
C15
C14
C13
C12
C11
C10
C9
C8
C5
C4
C3
C2
C1
DMU
UDS
DEN
C15-8 ............These bits determine Category Code of C-bit (channel status) output from DIT. Normally, set to
10011010b, whose value means “Sampling rate converter, Commercially released pre-recorded
software”.
C5-1 ..............These bits determine Control Code of C-bit (channel status) output from DIT.
Copyright Protection
Audio Data
Digital Data
Copyright
00000b
00001b
No Copyright
00010b
00011b
DMU.............Setting this bit to “1” mutes audio data output from DIT.
UDS ..............This bit selects the data output from DIT.
“0” : Data from the AC-Link
“1” : Data from A/D converter
DEN..............This bit selects whether the SPDIF signal is output from DIT or not.
“0” : DIT is power down state, and outputs low level.
“1” : SPDIF signal is output from DIT.
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相关代理商/技术参数 |
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|---|---|
| YMF743-S | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Consumer IC |
| YMF744B | 制造商:未知厂家 制造商全称:未知厂家 功能描述:DS-1S |
| YMF744BR | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Industrial Control IC |
| YMF744BV | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Industrial Control IC |
| YMF752 | 制造商:YAMAHA 制造商全称:YAMAHA CORPORATION 功能描述:AC97 Rev2.1 Audio CODEC with SRC |
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