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参数资料
| 型号： | YMF753-S |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封装： | SQFP-48 |
| 文件页数： | 8/26页 |
| 文件大小： | 185K |
| 代理商： | YMF753-S |
YMF753
March 6, 2001
16
SYSTEM CONNECTION DIAGRAM
1)
Power and Ground
To get the most out of analog performance, it is necessary to split the ground into analog and digital blocks.
Analog ground and digital ground earth at one point closed to the initial ground supply of the board. The
layout of the ground pattern should be designed as large as possible and the impudence should be reduced to
prevent from receiving ambient noise. In addition, use 0.1F and 47F capacitors to connect between the
analog voltage pin and the analog ground as well as between the digital supply pin and the digital ground.
2)
Reference Voltage
As the reference voltage determines all analog signals’ reference levels of YMF753, noise generated from
the reference voltage could affect the YMF753’s analog performance. To stabilize the YMF753’s reference
voltage, insert a 0.1F ceramic capacitor in parallel with a 22F capacitor between Vref pin and the ground.
The 0.1F ceramic capacitor should be designed as close to the Vref pin as possible
3)
Master Clock
To suppress the master clock from affecting its surroundings, it is recommended to keep the master clock
guarded on the ground so the noise can be reduced.
4)
Unused Analog Input / Output pins
For the unused analog input pins, short them through a 0.1F ceramic capacitor to the analog ground. For
the unused analog output pins, they should be left opened.
PC_BEEP
AUX_L
PHONE
SDAT
A_
IN
CAP1
LIN
E
_OU
T
_R
LIN
E
_OU
T
_L
SDAT
A_
O
U
T
BI
T
_
CL
K
SYNC
RESET
#
ZV
_S
IN
ZV
_LR
VIDEO_L
AUX_R
CD_L
YMF753-S
VIDEO_R
MIC1
CD_R
LINE_IN_L
LINE_IN_R
Vref
MSEL
L-ch LINE Out
R-ch LNLVL Out
R-ch LINE Out
AVdd1,2
+5.0V
DGND AGND
AVss1,2
PC Beep
L-ch AUX
Phone
L-ch Video
R-ch AUX
L-ch CD
R-ch Video
MIC
R-ch CD
L-ch Line IN
R-ch Line IN
CD_GND
CD Ground
+3.3V
Mono Out
L-ch LNLVL Out
LN
LV
L_OU
T
_L
LN
LV
L_OU
T
_R
ZV
_B
C
K
EXT
2
4
M
ZV BCK
SDATA IN
BIT CLK
RESET#
SYNC
SDATA OUT
DVdd1,2
EAPD
(
D
IT
)
DVss1,2
CAP2
MIC2
CAP3
CAP4
CAP5
CAP6
M
O
NO_
O
UT
XTL_OUT
XTL_IN
EAPD / DIT
ZV SIN
ZV LR
Vrefout
相关PDF资料 |
PDF描述 |
|---|---|
| YMF753 | AC97 Revision2.2 Audio CODEC with Digital Audio I/F |
| YMF754-R | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP128 |
| YMF754-V | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP128 |
| YMF754 | DS-1E |
| YMF754-R | DS-1E |
相关代理商/技术参数 |
参数描述 |
|---|---|
| YMF754 | 制造商:YAMAHA 制造商全称:YAMAHA CORPORATION 功能描述:DS-1E |
| YMF754-R | 制造商:YAMAHA 制造商全称:YAMAHA CORPORATION 功能描述:DS-1E |
| YMF754-V | 制造商:YAMAHA 制造商全称:YAMAHA CORPORATION 功能描述:DS-1E |
| YMF781 | 制造商:YAMAHA 制造商全称:YAMAHA CORPORATION 功能描述:APL-1 Automobile sound PLayer-1 |
| YMF795 | 制造商:YAMAHA 制造商全称:YAMAHA CORPORATION 功能描述:APL-2 Automobile sound Player-2 |
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