参数资料
型号: YMU762
元件分类: 音频合成
英文描述: TONE/MUSIC SYNTHESIZER, PQCC32
封装: PLASTIC, QFN-32
文件页数: 2/14页
文件大小: 165K
代理商: YMU762
PRELIMINARY
YMU762
10
Read cycle
Valid
/RD
A0
/CS
D0 -D7
TADS
TCSS
TADH
TCSH
TRW
TRDH
TACC
[Note]
TRDH : Time to the point where D0-D7 pins become high impedance.
TADH, TRDH : Defined with respect to the point where the rise of /CS or /RD, whichever earlier, has reached 0.7*Vdd.
TADS : Defined with respect to the point where the rise of /CS or /RD, whichever earlier, has reached 0.2*Vdd.
TACC : Defined with respect to the point where any of /CS , /RD and A0 has changed later.
Load current
Item
Min.
Typical
Max.
Unit
Load current of VDD+ IOVDD (at regular operation)
25
mA
At SPVDD side no tone
5
mA
At SPVDD side 8ohm load 400mW output
210
mA
Power down mode (VDD + IOVDD+SPVDD) (*1)
1
TBD
A
Note: TOP=-20 to 85°C, VDD, IOVDD=3.0±0.3V, SPVDD=3.6V
(*1) : Measurement condition : /CS input pin is fixed to VIH=VDD.
Analog characteristics
Conditions of TOP=25°C, VDD, IOVDD=3.0V and SPVDD=3.6V apply to all items.
SP amplifier
Item
Min.
Typical
Max.
Unit
Gain setting (fixed)
±2
times
Min. load resistance (RL)
8
Max.Output voltage amplitude (RL=8
)
5.8
Vp-p
Max. output power (RL=8
, THD+N≤1.0%)
550
mW
THD + N (RL=8
, f=1 kHz, output = 400mW)
0.05
%
Noise at no signal (A-filter: weighting filter)
-85
dBv
PSRR (f=1 kHz)
90
dB
Amplitude center potential (VSEL=0)
x 0.6
VDD
(VSEL=1)
x 0.5
VDD
Differential Output Voltage
10
50
mV
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