参数资料
型号: YNL05S10025-0
厂商: Power-One
文件页数: 5/23页
文件大小: 0K
描述: CONVERT DC/DC 2.5V OUT 25W SMD
标准包装: 310
系列: *
YNL05S100xy DC-DC Converter Family Data Sheet
3.0 to 5.5 VDC Input; 0.9 to 3.3 VDC @ 10 A Output
Operations
Input and Output Impedance
The Y-Series converter should be connected via a
low impedance to the DC power source. In many
applications, the inductance associated with the
160
140
120
100
80
60
distribution from the power source to the input of the
converter can affect the stability of the converter.
The use of decoupling capacitors is recommended in
40
20
0
Vin=5.0V
Vin=3.3V
order to ensure stability of the converter and reduce
0
1
2
3
4
input ripple voltage. Internally, the converter has
52 μ F (low ESR ceramics) of input capacitance.
In a typical application, low - ESR tantalum or POS
capacitors will be sufficient to provide adequate
ripple voltage filtering at the input of the converter.
However, very low ESR ceramic capacitors
100 - 200 μ F are recommended at the input of the
converter in order to minimize the input ripple
voltage. They should be placed as close as possible
to the input pins of the converter.
The YNL05S100xy has been designed for stable
operation with or without external capacitance. Low
ESR ceramic capacitors placed as close as possible
to the load (minimum 47 μ F) are recommended for
Vout [V]
Fig. B: Input Voltage Ripple, C IN = 470 μ F polymer +
2 x 47 μ F ceramic.
ON/OFF (Pin 1)
The ON/OFF pin is used to turn the power converter
on or off remotely via a system signal. There are two
remote control options available, positive logic
(standard option) and negative logic, with ON/OFF
signal referenced to GND. The typical connections
are shown in Fig. C.
improved transient performance and lower output
voltage ripple.
It is important to keep low resistance and low
R*
Vin
ON/OFF
Y-Series
Converter
(Top View)
SENSE
Vout
inductance PCB traces for connecting load to the
Vin
output pins of the converter in order to maintain good
load regulation.
GND
TRIM
Rload
Fig. A shows the input voltage ripple for various
output voltages using four 47 μ F input ceramic
capacitors. The same plot is shown in Fig. B with
one 470 μ F polymer capacitor (6TPB470M from
Sanyo) in parallel with two 47 μ F ceramic capacitors
at full load.
CONTROL
INPUT
R* is for negative logic option only
Fig. C: Circuit configuration for ON/OFF function.
To turn the converter on the ON/OFF pin should be
at a logic low or left open, and to turn the converter
off the ON/OFF pin should be at a logic high or
140
120
100
80
60
40
20
0
0
1
2
Vout [V]
3
Vin=5.0V
Vin=3.3V
4
connected to Vin. See the Electrical Specifications
for logic high/low definitions.
The positive logic version turns the converter on
when the ON/OFF pin is at a logic high or left open,
and turns the converter off when at a logic low or
shorted to GND.
The negative logic version turns the converter on
when the ON/OFF pin is at logic low or left open, and
turns the converter off when the ON/OFF pin is at a
logic high or connected to Vin.
The ON/OFF pin is internally pulled up to Vin for
Fig. A: Input Voltage Ripple, C IN = 4x47 μ F ceramic, full load.
positive logic version, and pulled down for a negative
logic version. A TTL or CMOS logic gate, open-
MCD10188 Rev. 1.0, 21-Jun-10
Page 5 of 23
www.power-one.com
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