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参数资料
| 型号： | YWW7640AE |
| 厂商： | IC MICROSYSTEMS Sdn. Bhd. |
| 英文描述： | Secure SerialFlash |
| 中文描述： | 安全SerialFlash |
| 文件页数： | 14/14页 |
| 文件大小： | 333K |
| 代理商： | YWW7640AE |
X76F400
Characteristics subject to change without notice.
9 of 14
REV 1.0 7/5/00
www.icmic.com
EQUIVALENT A.C. LOAD CIRCUIT
A.C. TEST CONDITIONS
3V
1.3KΟ
Output
100pF
5V
1.53KΟ
Output
100pF
Input pulse levels
VCC x 0.1 to VCC x 0.9
Input rise and fall times
10ns
Input and output timing level
VCC x 0.5
Output load
100pF
AC CHARACTERISTICS (TA = -40°C to +85°C, VCC = +2.5V to +5.5V, unless otherwise specified)
Notes: (1)Cb = total capacitance of one bus line in pF
(2)tAA = 1.1s Max below VCC = 2.5V.
RESET AC SPECIFICATIONS
Power Up Timing
Notes: (1)Delays are measured from the time VCC is stable until the specified operation can be initiated. These parameters are periodically sampled
and not 100% tested.
(2)Typical values are for TA = 25°C and VCC = 5.0V
Symbol
Parameter
Min.
Max.
Unit
fSCL
SCL clock frequency
0
1
MHz
tAA(2)
SCL LOW to SDA data out valid
0.1
0.9
s
tBUF
Time the Bus must be free before a new transmission can start
1.2
s
tHD:STA
Start condition hold time
0.6
s
tLOW
Clock LOW period
1.2
s
tHIGH
Clock HIGH period
0.6
s
tSU:STA
Start condition setup time (for a repeated start condition)
0.6
s
tHD:DAT
Data in hold time
10
ns
tSU:DAT
Data in setup time
100
ns
tR
SDA and SCL rise time
20+0.1XCb(1)
300
ns
tF
SDA and SCL fall time
20+0.1XCb(1)
300
ns
tSU:STO
Stop condition setup time
0.6
s
tDH
Data out hold time
0
s
tNOL
RST to SCL non-overlap
500
ns
tRDV
RST LOW to SDA valid during response to reset
0
450
ns
tCDV
CLK LOW to SDA valid during response to reset
0
450
ns
tRST
RST high time
1.5
s
tSU:RST
RST setup time
500
ns
Symbol
Parameter
Min.
Typ.
(2)
Max.
Unit
tPUR(1)
Time from power up to read
1
ms
tPUW(1)
Time from power up to write
5
ms
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相关代理商/技术参数 |
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|---|---|
| YWW7640AF | 制造商:ICMIC 制造商全称:IC MICROSYSTEMS 功能描述:Secure SerialFlash |
| YWW7640I | 制造商:ICMIC 制造商全称:IC MICROSYSTEMS 功能描述:Secure SerialFlash |
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