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参数资料
| 型号： | Z84C9010ASC |
| 厂商： | ZILOG INC |
| 元件分类： | 外设及接口 |
| 英文描述： | KIO Serial/Parallel Counter Timer |
| 中文描述： | MULTIFUNCTION PERIPHERAL, PQFP100 |
| 封装： | LQFP-100 |
| 文件页数： | 12/31页 |
| 文件大小： | 299K |
| 代理商： | Z84C9010ASC |
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Z84C90
KIO Serial/Parallel Counter Timer
PS011802-0902
7
IEI.
Interrupt Enable In (input, Active High). This signal is used with Interrupt Enable
Out (IEO) to form a priority daisy chain when there is more than one interrupt-driven
device. A High on this line indicates that no higher-priority device is requesting an inter-
rupt.
IEO.
Interrupt Enable Out (output, Active High). This signal is used with Interrupt Enable
In (IEI) to form a priority daisy chain when there is more than one interrupt-driven device.
A High on this line indicates that this device is requesting an interrupt, and that no higher-
priority device, is not requesting an interrupt. A Low blocks any lower-priority devices
from requesting an interrupt.
IORQ.
Input/Output Request (input, Active Low). IORQ is used with RD, A
0
–A
3
, and CS
to transfer data between the KIO and the CPU. When IORQ, RD, and CS are Active Low,
the device selected by A
0
–A
3
transfers data to the CPU. When IORQ and CS are Active
Low, but RD is Active High, the device selected by A
0
–A
3
is written into by the CPU.
When IORQ and M1 are both Active Low, the KIO may respond with an interrupt vector
from its highest-priority interrupting device.
M1.
Machine Cycle 1 (input, Active Low). When M1 and RD are Low, the Z80 CPU
fetches an instruction from memory; the KIO decodes this cycle to determine if the RETI
instruction sequence is being executed. When M1 and IORQ are both active, the KIO
decodes the cycle to be an interrupt acknowledge, and may respond with a vector from its
highest-priority interrupting device.
OSC.
Oscillator (output). This output is a reference clock for the oscillator.
PA0–PA7.
Port A Bus (bidirectional, tristated). One of the 8-bit ports of the PIO. PA
0
is
the least-significant bit of the bus.
PB0–PB7.
Port B Bus (bidirectional, tristated). One of the 8-bit ports of the PIO. PB
0
is
the least-significant bit of the bus. This port can also supply 1.5mA at 1.5V to drive Dar-
lington transistors.
PC0–PC7.
Port C Bus (bidirectional, tristated). PC
0
is the least-significant bit of the bus.
These pins are multiplexed between the 8-bit PIA and additional modem control signals
for the serial channels.
RD.
Read (input, Active Low). When RD is active, a memory or I/O read operation is in
progress. RD is used with A
0
–A
3
, CS and IORQ to transfer data between the KIO and
CPU.
RESET.
Reset (input, Active Low). A Low on this pin forces the KIO into a Reset condi-
tion. This signal must be active for a minimum of three Clock cycles. The KIO resets so
that the PIO ports operate in Mode 1
With handshakes inactive and interrupts disabled
PIA port in Input mode and active
CTC channel counting terminated and interrupts disabled
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相关代理商/技术参数 |
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| Z84C9010ASC00TR | 功能描述:IC Z80 MPU KIO 100LQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微处理器 系列:Z80 标准包装:2 系列:MPC8xx 处理器类型:32-位 MPC8xx PowerQUICC 特点:- 速度:133MHz 电压:3.3V 安装类型:表面贴装 封装/外壳:357-BBGA 供应商设备封装:357-PBGA（25x25） 包装:托盘 |
| Z84C9010ASG | 功能描述:输入/输出控制器接口集成电路 10 MHZ Z80 KIO RoHS:否 制造商:Silicon Labs 产品: 输入/输出端数量: 工作电源电压: 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:QFN-64 封装:Tray |
| Z84C9010VEC | 功能描述:输入/输出控制器接口集成电路 10MHz Z80 KIO XTEMP RoHS:否 制造商:Silicon Labs 产品: 输入/输出端数量: 工作电源电压: 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:QFN-64 封装:Tray |
| Z84C9010VEC00TR | 功能描述:IC Z80 MPU KIO 84PLCC RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微处理器 系列:Z80 标准包装:40 系列:MPC83xx 处理器类型:32-位 MPC83xx PowerQUICC II Pro 特点:- 速度:267MHz 电压:0.95 V ~ 1.05 V 安装类型:表面贴装 封装/外壳:516-BBGA 裸露焊盘 供应商设备封装:516-PBGAPGE（27x27） 包装:托盘 |
| Z84C9010VEG | 功能描述:输入/输出控制器接口集成电路 10MHz Z80 KIO XTEMP RoHS:否 制造商:Silicon Labs 产品: 输入/输出端数量: 工作电源电压: 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:QFN-64 封装:Tray |
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