参数资料
型号: ZL1505ALNNT6
厂商: Intersil
文件页数: 10/13页
文件大小: 0K
描述: IC MOSFET DVR STP-DN SYNC 10DFN
标准包装: 6,000
配置: 高端和低端,同步
输入类型: PWM
延迟时间: 31.5ns
电流 - 峰: 3.2A
配置数: 1
输出数: 2
高端电压 - 最大(自引导启动): 30V
电源电压: 3 V ~ 30 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 10-VFDFN 裸露焊盘
供应商设备封装: 10-DFN(3x3)
包装: 带卷 (TR)
ZL1505
Typical Performance Curves
+85°C, +25°C, and -25°C. (Continued)
17.5
15.5
Performance curves with temperature are measured at ambient temperatures (T A ) of
8.5
+25 ° C
7.5
13.5
11.5
9.5
7.5
5.5
3.5
HSEL = BST
HSEL = SW
6.5
5.5
4.5
3.5
-25 ° C
+85 ° C
4.5
5.0
5.5
6.0
6.5
7.0
7.5
4.5
5.0
5.5
6.0
6.5
7.0
7.5
V DD (V)
FIGURE 22. HIGH-SIDE DRIVER RISE TIME, t RH (CGH = 3nF,
T A = +25°C)
11.5
V DD (V)
FIGURE 23. t RH WITH TEMPERATURE (C GH = 3nF, HSEL = BST)
7.5
9.5
7.5
HSEL = SW
6.5
5.5
+85 ° C
+25 ° C
HSEL = BST
5.5
3.5
4.5
3.5
-25 ° C
4.5
5.0
5.5
6.0
6.5
7.0
7.5
4.5
5.0
5.5
6.0
6.5
7.0
7.5
V DD (V)
FIGURE 24. HIGH-SIDE DRIVER FALL TIME, t FH (CGH = 3nF,
T A = +25°C)
ZL1505 Overview
Theory of Operation
The ZL1505 is a synchronous N-channel MOSFET driver that is
intended for use with Zilker Labs Digital-DC PWM controllers to
enable a high-efficiency DC/DC conversion scheme. The
patented Digital-DC control scheme utilizes a closed-loop
algorithm to optimize the dead-time applied between the gate
drive signals for the high-side and low-side MOSFETs. By
monitoring the duty cycle of the resulting DC/DC converter
circuit, this dynamic routine continuously varies the MOSFET
dead times to optimize conversion efficiency in response to
varying circuit conditions. The ZL1505’s dual PWM input
configuration enables this optimization scheme to be applied
while minimizing the complexity within the driver device. Please
refer to the ZL2004 data sheet for details on the dynamic
dead-time optimization routine.
The ZL1505 integrates two powerful gate drivers that have been
optimized for step-down DC/DC conversion circuit configurations
10
V DD (V)
FIGURE 25. t FH WITH TEMPERATURE (C GH = 3nF, HSEL = BST)
whose output current can exceed 40A per phase. The ZL1505
also integrates a 30V bootstrap Schottky diode to minimize the
external components and provide a high drive voltage to the
high-side driver device.
Variable Gate Drive Current
The ZL1505 incorporates an innovative variable drive current
scheme that enables the user to optimize the gate drive current
levels to the requirements of the external MOSFETs used over a
wide range of operating frequencies. Each of the gate drivers
incorporates a logic input (HSEL and LSEL) that allows the user to
select the gate drive strength to 50% or 100% of the total rated
drive current.
With the HSEL pin connected to the BST pin, the high-side driver
can deliver the full rated gate drive current; with the HSEL pin
connected to the SW pin, the output current will be limited to
50% of the full rated output capability. With the LSEL pin
connected to VDD, the low-side driver can deliver the full rated
gate drive current; with the LSEL pin connected to GND, the
FN6845.3
February 25, 2011
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