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参数资料
| 型号： | 08906-808-XTD |
| 厂商： | ON SEMICONDUCTOR |
| 元件分类： | 无绳电话/电话 |
| 英文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, PQFP64 |
| 封装： | GREEN, TQFP-64 |
| 文件页数： | 1/9页 |
| 文件大小： | 330K |
| 代理商： | 08906-808-XTD |
AMIS-50050: Spread Spectrum Baseband Controllers
Data Sheet
Wireless Products
1.0 Introduction
AMI Semiconductor’s wireless product portfolio includes the AMIS-50050 spread spectrum baseband transceiver controller. AMI
Semiconductor’s AMIS-5005x products simplify the design of direct sequence spread spectrum radios. They contain all the baseband
circuitry needed to implement a radio, thus providing an economical solution to the extensive digital hardware requirements of high
performance spread spectrum radios. The AMIS-50050 is a low power device optimal for portable battery powered applications. It
utilizes a 3.3V power supply and interfaces to a 3V microprocessor and logic.
2.0 Key Features
Low power with user controlled ‘shutdown’ modes
3.3V (+/-10 percent)
Narrow band and spread spectrum operation, independently selectable for transmit and receive
Performs all baseband functions required for implementation of direct sequence spread spectrum and can be used in any radio
frequency band
User programmable transmission protocol with pass through or packetization formatting
Generic microprocessor interface
Full or half duplex operation
High process gain (up to 2047chips/bit) with data rates from 100bps to 4Mbps
Independent transmit and receive PN code generators
Gold code and 11 -chip Barker code options
Programmable preamble lengths for faster acquisition when there has been recent transmission or reception
Byte-wide transmit and receive FIFOs
16 or 32 bit CRC error checking
8 or 16 bit receiver addressing
Optional data scrambling
Support for: binary phase shift keying (BPSK); differential binary phase shift keying (DBPSK); quadrature phase shift keying (QPSK);
differential quadrature phase shift keying (DQPSK)
Continuous tracking feature for transferring multiple packets of data at high data rates without reacquiring synchronized packet
The AMIS-50050 is a low power device optimal for portable battery powered applications. It utilizes a 3.3V power supply and interfaces
to a 3V microprocessor and logic.
The AMIS-50050 IC consists of a microprocessor interface and a full duplex transmit/receive message processor circuit. Included in the
AMIS-50050 message transmit processor circuits are the data scrambler, packet generator, CRC generator, pseudonoise (PN) code
generator, and modulation mode formatter. The AMIS-50050 message processor receive circuits include the receive PN code
generator, receive synchronization and tau-dither tracking loop, integrate and dump control, data descrambler, packet decoder, CRC
checker, demodulator, and signal strength indicator. Each transmit and receive PN code generator consists of two 11-bit PN
generators, allowing selection of an ‘A’ code, a “B” code, or a “Gold code” combination of the “A” and “B” codes. AMI Semiconductor’s
AMIS-50050 uses separate transmit and receive 64MHz VCOs, which allow fully independent transmit and receive operations.
AMI Semiconductor’s wireless ICs interface to a generic microprocessor bus for programming and data transfer and to an IF
modulator/demodulator and RF radio for the transmission medium. 8530 SCC operation and HDLC protocol are emulated for the
message packetization and error checking. No packetization can be selected for data to be transmitted as received from the host.
The AMIS-50050 is a high performance part, capable of chipping rates up to 64Mchips/second in transmit and receive modes. This
results in a maximum data rate of 2Mbps using QPSK or DQPSK modulation and a PN code length of 63. A maximum data rate of
1Mbps is achieved using BPSK or DBPSK modulation and a PN code length of 63. At lower chipping rates the ICs are capable of
generating code lengths up to 2047 chips. The lowest possible chipping rate is 300Hz. The flexibility of the design allows an optimal
combination of transmitted power, system process gain, system bandwidth and bit rate in order to achieve a reliable communication
channel with minimum interference to other adjacent channels or co-channel users.
1
AMI Semiconductor
– Jan. 08, M-20717-002
www.amis.com
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