参数资料
型号: 11AA010T-I/TT
厂商: Microchip Technology
文件页数: 13/44页
文件大小: 0K
描述: IC EEPROM 1KBIT 100KHZ SOT23-3
标准包装: 1
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 1K (128 x 8)
速度: 100kHz
接口: UNI/O?(单线)
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: TO-236-3,SC-59,SOT-23-3
供应商设备封装: SOT-23-3
包装: 标准包装
产品目录页面: 1443 (CN2011-ZH PDF)
其它名称: 11AA010T-I/TTDKR
11AAXXX/11LCXXX
4.4
Write Enable ( WREN ) and Write
Disable ( WRDI ) Instructions
The following is a list of conditions under which the
write enable latch will be reset:
The 11XX contains a write enable latch. See Table 6-1
for the Write-Protect Functionality Matrix. This latch
must be set before any write operation will be com-
pleted internally. The WREN instruction will set the
latch, and the WRDI instruction will reset the latch.
Note: The WREN and WRDI instructions must
be terminated with a NoMAK following
the command byte. If a NoMAK is not
received at this point, the command will
be considered invalid, and the device
will go into Idle mode without responding
with a SAK or executing the command.
?
?
?
?
?
?
Power-up
WRDI instruction successfully executed
WRSR instruction successfully executed
WRITE instruction successfully executed
ERAL instruction successfully executed
SETAL instruction successfully executed
FIGURE 4-4:
WRITE ENABLE COMMAND SEQUENCE
SCIO
Standby Pulse
Start Header
0 1 0 1 0 1 0 1
Device Address
1 0 1 0 0 0 0 0 (1)
Command
SCIO
1 0 0 1 0 1 1 0
Note 1: For the 11XXXX1, this bit must be a ‘ 1 ’.
FIGURE 4-5:
WRITE DISABLE COMMAND SEQUENCE
SCIO
Standby Pulse
Start Header
0 1 0 1 0 1 0 1
Device Address
1 0 1 0 0 0 0 0 (1)
Command
SCIO
1 0 0 1 0 0 0 1
Note 1: For the 11XXXX1, this bit must be a ‘ 1 ’.
? 2010 Microchip Technology Inc.
Preliminary
DS22067H-page 13
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