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| 型号： | 19077 |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO28 |
| 封装： | SOIC-28 |
| 文件页数： | 2/8页 |
| 文件大小： | 366K |
| 代理商： | 19077 |
Vicor Corp. Tel: 800-735-6200, 978-470-2900 Fax: 978-475-6715
PAC, Phased Array Controller
Rev. 1.2
Page 2 of 8
Set your site on VICOR at vicorpower.com
PR 1-12 (PARALLEL): The Parallel (PR) pin is a
bi-directional port. As an input, the PR pin of the PAC
receives sync pulse information from the module which is
controlling the array. As an output, the Parallel pin
provides phase displaced synchronous information to the
slave modules. The frequency of the PR signal is variable
and is used to trigger the power pulse transfer from the
primary to the secondary of the transformer within each
converter.
The PAC PR pin is active high / low, and is not tri-stated
when receiving the driver pulse. At start up, since more
than one converter may deliver a sync pulse, each PR pin
listens to it’s module. The PR pulse is received from a low
impedance emitter follower within a converter. As shown
in figure 3, the typical wave-shape is a triangular pulse.
Figure 4 provides a simplified circuit diagram of each PR
port within the PAC. As an input, the PAC employs
Schmitt triggers to shape incoming PR pulses. Hysteresis
provides noise immunity. As an output, the PR signal is
generated via a PMOS Driver. Once the driver pulse rises
above the Schmitt trigger threshold, the Schmitt will send
a signal to the control circuitry that is delayed by
approximately 50 ns(typ). After the delay time, the control
circuitry will send a signal to turn on an NMOS pull down
transistor, which has low channel impedance, thus
terminating the pulse.
PIN FUNCTION DESCRIPTIONS
6 V
40 ns
Figure 3: Module PR Pulse
Delay
Control
Unit
Vcc
Fi
PACPRD i
PR
Figure 4: PR In/Out port
Q
SET
CLR
S
R
Q
SET
CLR
S
R
Q
SET
CLR
D
R
F1
N*F
F3
50n
PR1
PC1
IN1
OUT1
F
F2
F1
G1
G2
G3
G4
G5
Q
SET
CLR
S
R
Q
SET
CLR
S
R
Q
SET
CLR
D
R
F1
N*F
F3
PR2
PC2
IN2
OUT2
F
F2
G2
G3
G4
G5
50n
G1
Q
SET
CLR
S
R
Q
SET
CLR
S
R
Q
SET
CLR
D
R
F1
N*F
F3
PR3
PC3
IN3
OUT3
F
F2
F3
G2
G3
G4
G5
50n
G1
N*F
F
F3
F2
F1
12
PC
EXT.
VCC
INT.
VCC
POWER
ON
RESET
SYSTEM
DISABLE
SYS.
RESET
WATCH
DOG
OK
12
EN. PC
EN. PR
PLL
PC
12
Additional
9 Cells
Figure 2—Simplified functional block and timing diagrams illustrating three operational cells, where cell #1 interfaces the driver
module, cell #2 interfaces a disabled module, and cell #3 interfaces a module operating in the booster mode.
PR1
SF1
PC1
PR2
PC2
PR3
PC3
QF1
SF2
QF2
OUT1
IN1
DF3
QF3
RF1
F
N*F
IN2
OUT2
IN3
DF3
QF3
Driver Cell #1
Off Cell #2
Booster Cell #3
Driver (PC high)
Off (PC low)
Booster (PC high)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 190770001 | 制造商:MOLEX 制造商全称:Molex Electronics Ltd. 功能描述:Avikrimp? Star Ring Tongue Terminal for 18-22 AWG Wire, Stud Size 6 |
| 19077-0001 | 功能描述:端子 STAR RING AVIKRIMP ( VIKRIMP (SRA-829-06) RoHS:否 制造商:AVX 产品:Junction Box - Wire to Wire 系列:9826 线规:26-18 接线柱/接头大小: 绝缘: 颜色:Red 型式:Female 触点电镀:Tin over Nickel 触点材料:Beryllium Copper, Phosphor Bronze 端接类型:Crimp |
| 190770002 | 制造商:MOLEX 制造商全称:Molex Electronics Ltd. 功能描述:Avikrimp? Star Ring Tongue Terminal for 18-22 AWG Wire, Stud Size 6, Mylar TapeCarrier |
| 19077-0002 | 功能描述:端子 STAR RING RoHS:否 制造商:AVX 产品:Junction Box - Wire to Wire 系列:9826 线规:26-18 接线柱/接头大小: 绝缘: 颜色:Red 型式:Female 触点电镀:Tin over Nickel 触点材料:Beryllium Copper, Phosphor Bronze 端接类型:Crimp |
| 190770005 | 制造商:Molex 功能描述:Star Ring Tongue Terminal 18-22AWG 23.62mm 9.78mm Tin Box |
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