参数资料
| 型号： | 24AA014H-I/MS |
| 厂商： | Microchip Technology |
| 文件页数： | 9/28页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 1KBIT 400KHZ 8MSOP |
| 产品培训模块： | I2C Serial EEPROM |
| 标准包装： | 100 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 1K (128 x 8) |
| 速度： | 100kHz，400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 1.7 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-TSSOP，8-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 8-MSOP |
| 包装： | 管件 |
| 产品目录页面： | 1444 (CN2011-ZH PDF) |
第1页第2页第3页第4页第5页第6页第7页第8页当前第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页
24AA014H/24LC014H
6.0
6.1
WRITE OPERATIONS
Byte Write
The higher order four bits of the word address remain
constant. If the master should transmit more than 16
bytes prior to generating the Stop condition, the
address counter will roll over and the previously
Following the Start signal from the master, the device
code(4 bits), the Chip Select bits (3 bits) and the R/W
bit (which is a logic low) are placed onto the bus by the
master transmitter. The device will acknowledge this
control byte during the ninth clock pulse. The next byte
transmitted by the master is the word address and will
be written into the Address Pointer of the 24AA014H/
24LC014H. After receiving another Acknowledge
signal from the 24AA014H/24LC014H, the master
received data will be overwritten. As with the byte write
operation, once the Stop condition is received, an
internal write cycle will begin (Figure 6-2). If an attempt
is made to write to the protected portion of the array
when the hardware write protection has been enabled,
the device will acknowledge the command, but no data
will be written. The write cycle time must be observed
even if write protection is enabled.
device will transmit the data word to be written into the
addressed memory location. The 24AA014H/
24LC014H acknowledges again and the master
generates a Stop condition. This initiates the internal
write cycle and the 24AA014H/24LC014H will not
generate Acknowledge signals during this time
(Figure 6-1). If an attempt is made to write to the
protected portion of the array when the hardware write
protection has been enabled, the device will
acknowledge the command, but no data will be written.
The write cycle time must be observed even if write
protection is enabled.
Note:
Page write operations are limited to writing
bytes within a single physical page,
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size (or
‘page size’) and end at addresses that are
integer multiples of [page size – 1]. If a
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
6.2
Page Write
being written to the next page, as might be
expected. It is therefore necessary that the
The write-control byte, word address and the first data
byte are transmitted to the 24AA014H/24LC014H in the
same way as in a byte write. But instead of generating
a Stop condition, the master transmits up to 15
application software prevent page write
operations that would attempt to cross a
page boundary.
additional data bytes to the 24AA014H/24LC014H that
6.3
Write Protection
are temporarily stored in the on-chip page buffer and
will be written into the memory once the master has
transmitted a Stop condition. Upon receipt of each
word, the four lower order Address Pointer bits are
internally incremented by one.
The WP pin must be tied to V CC or V SS . If tied to V CC ,
half of the array will be write-protected (40h-7Fh). If the
WP pin is tied to V SS , write operations to all address
locations are allowed.
FIGURE 6-1:
BYTE WRITE
Bus Activity
Master
S
T
A
R
T
Control
Byte
Word
Address
Data
S
T
O
P
SDA Line
S
P
A
A
A
Bus Activity
FIGURE 6-2:
PAGE WRITE
C
K
C
K
C
K
S
Bus Activity
Master
T
A
R
T
Control
Byte
Word
Address (n)
Data (n)
Data (n +1)
Data (n + 15)
S
T
O
P
SDA Line
S
P
A
A
A
A
A
Bus Activity
C
K
C
K
C
K
C
K
C
K
? 2008 Microchip Technology Inc.
Preliminary
DS22077B-page 9
相关PDF资料 |
PDF描述 |
|---|---|
| 11LC161T-I/MNY | IC EEPROM 16K SER IND 8TDFN |
| 11AA161T-I/MNY | IC EEPROM 16K SER IND 8TDFN |
| ABC49DRYI-S93 | CONN EDGECARD 98POS DIP .100 SLD |
| 166291-1 | CONN SOCKET 24-20AWG 30GOLD |
| HMC43DRYS-S734 | CONN EDGECARD 86POS DIP .100 SLD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 24AA014HT | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K I2C? Serial EEPROM with Half-Array Write-Protect |
| 24AA014HT-E/MNY | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K I2C? Serial EEPROM with Half-Array Write-Protect |
| 24AA014HT-E/MS | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K I2C? Serial EEPROM with Half-Array Write-Protect |
| 24AA014HT-E/P | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K I2C? Serial EEPROM with Half-Array Write-Protect |
| 24AA014HT-E/SN | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K I2C? Serial EEPROM with Half-Array Write-Protect |
发布紧急采购，3分钟左右您将得到回复。