参数资料
| 型号： | 24AA08H-I/P |
| 厂商： | Microchip Technology |
| 文件页数： | 3/28页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 8KBIT 400KHZ 8DIP |
| 产品培训模块： | I2C Serial EEPROM |
| 标准包装： | 60 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 8K (4 x 256 x 8) |
| 速度： | 100kHz，400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 1.7 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 8-PDIP |
| 包装： | 管件 |
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24AA08H/24LC08BH
TABLE 1-2:
AC CHARACTERISTICS
AC CHARACTERISTICS
Industrial (I):
Automotive (E):
T A = -40°C to +85°C, V CC = +1.7V to +5.5V
T A = -40°C to +125°C, V CC = +2.5V to +5.5V
Param.
No.
1
2
Symbol
F CLK
T HIGH
Characteristic
Clock Frequency
Clock High Time
Min.
—
—
600
Max.
400
100
—
Units
kHz
ns
Conditions
2.5V ≤ V CC ≤ 5.5V
1.7V ≤ V CC < 2.5V (24AA08H)
2.5V ≤ V CC ≤ 5.5V
4000
—
1.7V ≤ V CC < 2.5V (24AA08H)
3
T LOW
Clock Low Time
1300
—
ns
2.5V ≤ V CC ≤ 5.5V
4700
—
1.7V ≤ V CC < 2.5V (24AA08H)
4
5
6
7
T R
T F
T HD : STA
T SU : STA
SDA and SCL Rise Time
(Note 1)
SDA and SCL Fall Time
Start Condition Hold Time
Start Condition Setup Time
—
—
—
600
4000
600
300
1000
300
—
—
—
ns
ns
ns
ns
2.5V ≤ V CC ≤ 5.5V
1.7V ≤ V CC < 2.5V (24AA08H)
(Note 1)
2.5V ≤ V CC ≤ 5.5V
1.7V ≤ V CC < 2.5V (24AA08H)
2.5V ≤ V CC ≤ 5.5V
4700
—
1.7V ≤ V CC < 2.5V (24AA08H)
8
9
T HD : DAT
T SU : DAT
Data Input Hold Time
Data Input Setup Time
0
100
—
—
ns
ns
(Note 2)
2.5V ≤ V CC ≤ 5.5V
250
—
1.7V ≤ V CC < 2.5V (24AA08H)
10
T SU : STO
Stop Condition Setup Time
600
—
ns
2.5V ≤ V CC ≤ 5.5V
4000
—
1.7V ≤ V CC < 2.5V (24AA08H)
11
12
T SU : WP
T HD : WP
WP Setup Time
WP Hold Time
600
4000
1300
—
—
—
ns
ns
2.5V ≤ V CC ≤ 5.5V
1.7V ≤ V CC < 2.5V (24AA08H)
2.5V ≤ V CC ≤ 5.5V
4700
—
1.7V ≤ V CC < 2.5V (24AA08H)
13
T AA
Output Valid from Clock
—
900
ns
2.5V ≤ V CC ≤ 5.5V
(Note 2)
—
3500
1.7V ≤ V CC < 2.5V (24AA08H)
14
T BUF
Bus free time: Time the bus
must be free before a new
1300
4700
—
—
ns
2.5V ≤ V CC ≤ 5.5V
1.7V ≤ V CC < 2.5V (24AA08H)
transmission can start
15
16
T OF
T SP
Output Fall Time from V IH
Minimum to V IL Maximum
Input Filter Spike Suppression
—
—
—
250
250
50
ns
ns
2.5V ≤ V CC ≤ 5.5V
1.7V ≤ V CC < 2.5V (24AA08H)
(Notes 1 and 3)
(SDA and SCL pins)
17
T WC
Write Cycle Time (byte or
—
5
ms
—
page)
18
—
Endurance
1M
—
cycles 25°C, (Note 4)
Note 1:
2:
3:
4:
Not 100% tested. C B = total capacitance of one bus line in pF.
As a transmitter the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
The combined T SP and V HYS specifications are due to new Schmitt Trigger inputs which provide improved
noise spike suppression. This eliminates the need for a T I specification for standard operation.
This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance? Model which can be obtained on Microchip’s web site at
www.microchip.com.
? 2008 Microchip Technology Inc.
DS22084A-page 3
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