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参数资料
| 型号： | 24AA65-SM |
| 厂商： | Microchip Technology Inc. |
| 英文描述： | 64K 1.8V I 2 C O Smart Serial O EEPROM |
| 中文描述： | 64K的1.8VI 2二氧化碳?串行EEPROM的智能 |
| 文件页数： | 3/12页 |
| 文件大小： | 105K |
| 代理商： | 24AA65-SM |
1996 Microchip Technology Inc.
DS21056F-page 11
24AA65
FIGURE 8-2:
CACHE WRITE TO THE ARRAY STARTING AT A PAGE BOUNDARY
FIGURE 8-3:
CACHE WRITE TO THE ARRAY STARTING AT A NON-PAGE BOUNDARY
1 Write command initiated at byte 0 of page 3 in the array;
First data byte is loaded into the cache byte 0.
2 64 bytes of data are loaded into cache.
3 Write from cache into array initiated by STOP bit.
Page 0 of cache written to page 3 of array.
Write cycle is executed after every page is written.
4 Remaining pages in cache are written
to sequential pages in array.
cache
byte 0
cache
byte 1
cache
byte 7
cache page 1
bytes 8-15
page 0
cache page 2
bytes 16-23
cache page 7
bytes 56-63
page 1 page 2
byte 7
page 4
page 7
page 3
cache page 0
Last page in cache written to page 2 in next row.
5
array row n
array row n + 1
page 0 page 1 page 2
byte 0
byte 1
page 4
page 7
1 Write command initiated; 64 bytes of data
loaded into cache starting at byte 2 of page 0.
2 Last 2 bytes loaded 'roll over'
to beginning.
3
Last 2 bytes
loaded into
page 0 of cache.
4 Write from cache into array initiated by STOP bit.
Page 0 of cache written to page 3 of array.
Write cycle is executed after every page is written.
cache
byte 1
cache
byte 2
cache
byte 7
cache page 1
bytes 8-15
page 0
cache page 2
bytes 16-23
cache page 7
bytes 56-63
page 1 page 2
page 4
page 7
page 3
Remaining bytes in cache are
written sequentially to array.
5
array
row n
array
row
n + 1
cache
byte 0
Last 3 pages in cache written to next row in array.
6
page 1 page 2
byte 0
byte 2
byte 1
page 4
page 7
byte 7
byte 3
byte 4
page 0
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