参数资料
| 型号： | 24C01C-I/MS |
| 厂商： | Microchip Technology |
| 文件页数： | 5/36页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 1KBIT 400KHZ 8MSOP |
| 产品培训模块： | I2C Serial EEPROM |
| 标准包装： | 100 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 1K (128 x 8) |
| 速度： | 400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-TSSOP，8-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 8-MSOP |
| 包装： | 管件 |
| 产品目录页面： | 1444 (CN2011-ZH PDF) |
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24C01C
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1 .
TABLE 2-1:
PIN FUNCTION TABLE
Name
A0
A1
A2
V SS
SDA
SCL
Test
V CC
8-pin
PDIP
1
2
3
4
5
6
7
8
8-pin
SOIC
1
2
3
4
5
6
7
8
8-pin
TSSOP
1
2
3
4
5
6
7
8
8-pin
MSOP
1
2
3
4
5
6
7
8
8-pin
DFN/TDFN
1
2
3
4
5
6
7
8
SOT-23
5
4
—
2
3
1
—
6
Function
Chip Select
Chip Select
Chip Select
Ground
Serial Data
Serial Clock
Test
+4.5V to 5.5V Power Supply
2.1
SDA Serial Data
2.5
Noise Protection
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal; therefore, the SDA bus requires a pull-
up resistor to V CC (typical 10 k ? for 100 kHz, 2 k ? for
400 kHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
The 24C01C employs a V CC threshold detector circuit
which disables the internal erase/write logic if the V CC
is below 3.8 volts at nominal conditions.
The SCL and SDA inputs have Schmitt Trigger and
filter circuits which suppress noise spikes to assure
proper device operation even on a noisy bus.
2.2
SCL Serial Clock
This input is used to synchronize the data transfer from
and to the device.
2.3
A0, A1, A2
The levels on these inputs are compared with the
corresponding bits in the slave address. The chip is
selected if the compare is true.
Up to eight 24C01C devices may be connected to the
same bus by using different Chip Select bit combina-
tions. These inputs must be connected to either V CC or
V SS .
For the SOT-23 devices up to four devices may be con-
nected to the same bus using different Chip Select bit
combinations.
In most applications, the chip address inputs A0, A1
and A2 are hard-wired to logic ‘ 0 ’ or logic ‘ 1 ’. For
applications in which these pins are controlled by a
microcontroller or other programmable device, the chip
address pins must be driven to logic ‘ 0 ’ or logic ‘ 1 ’
before normal device operation can proceed.
2.4
Test
This pin is utilized for testing purposes only. It may be
tied high, tied low or left floating.
? 1997-2012 Microchip Technology Inc.
DS21201K-page 5
相关PDF资料 |
PDF描述 |
|---|---|
| 93LC66A-I/ST | IC EEPROM 4KBIT 2MHZ 8TSSOP |
| 24LC16B-I/P | IC EEPROM 16KBIT 400KHZ 8DIP |
| 93LC66B-I/MS | IC EEPROM 4KBIT 2MHZ 8MSOP |
| 24C02C-I/ST | IC EEPROM 2KBIT 400KHZ 8TSSOP |
| 24LC16B/P | IC EEPROM 16KBIT 400KHZ 8DIP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 24C01C-IP | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K 5.0V I 2 C ⑩ Serial EEPROM |
| 24C01C-ISN | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K 5.0V I 2 C ⑩ Serial EEPROM |
| 24C01C-IST | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K 5.0V I 2 C ⑩ Serial EEPROM |
| 24C01CP | 制造商:Microchip Technology Inc 功能描述: |
| 24C01C-P | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:1K 5.0V I 2 C ⑩ Serial EEPROM |
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