参数资料
型号: 24LC08B/P
元件分类: PROM
英文描述: 1K X 8 I2C/2-WIRE SERIAL EEPROM, PDIP8
封装: 0.300 INCH, PLASTIC, DIP-8
文件页数: 20/20页
文件大小: 355K
代理商: 24LC08B/P
2001 Microchip Technology Inc.
DS21051H-page 9
24LC04B/08B
FIGURE 7-1:
CURRENT ADDRESS READ
FIGURE 7-2:
RANDOM READ
FIGURE 7-3:
SEQUENTIAL READ
8.0
PIN DESCRIPTIONS
8.1
SDA Serial Address/Data Input/
Output
This is a bi-directional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal. Therefore, the SDA bus requires a pull-
up resistor to VCC (typical 10K
for 100 kHz, 2 K for
400 kHz).
For normal data transfer, SDA is allowed to change
only during SCL LOW. Changes during SCL HIGH are
reserved for indicating the START and STOP condi-
tions.
8.2
SCL Serial Clock
This input is used to synchronize the data transfer from
and to the device.
8.3
WP
This pin must be connected to either VSS or VCC.
If tied to VSS, normal memory operation is enabled
(read/write the entire memory).
If tied to VCC, WRITE operations are inhibited. The
entire memory will be write-protected. Read operations
are not affected.
This feature allows the user to use the 24LC04B/08B
as a serial ROM when WP is enabled (tied to VCC).
8.4
A0, A1, A2
These pins are not used by the 24LC04B/08B. They
may be left floating or tied to either VSS or VCC.
SP
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
A
R
T
S
T
O
P
CONTROL
BYTE
DATA (n)
A
C
K
N
O
A
C
K
S
P
S
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
A
R
T
S
T
O
P
CONTROL
BYTE
A
C
K
WORD
ADDRESS (n)
CONTROL
BYTE
S
T
A
R
T
DATA (n)
A
C
K
A
C
K
N
O
A
C
K
P
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
O
P
CONTROL
BYTE
A
C
K
N
O
A
C
K
DATA (n)
DATA (n + 1)
DATA (n + 2)
DATA (n + X)
A
C
K
A
C
K
A
C
K
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