参数资料
型号: 24LC21T/SN
厂商: Microchip Technology
文件页数: 7/24页
文件大小: 0K
描述: IC EEPROM 1KBIT 400KHZ 8SOIC
产品培训模块: I2C Serial EEPROM
标准包装: 3,300
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 1K (128 x 8)
速度: 100kHz,400kHz
接口: I²C,2 线串口
电源电压: 2.5 V ~ 5.5 V
工作温度: 0°C ~ 70°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 带卷 (TR)
24LC21
3.1.6
SLAVE ADDRESS
4.0
WRITE OPERATION
After generating a Start condition, the bus master trans-
mits the slave address consisting of a 7-bit device code
4.1
Byte Write
‘ 1010 ’ for the 24LC21, followed by three “don’t care”
bits.
The eighth bit of slave address determines if the master
device wants to read or write to the 24LC21 (Figure 3-5).
The 24LC21 monitors the bus for its corresponding
slave address all the time. It generates an
Acknowledge bit if the slave address was true and it is
not in a programming mode.
Following the Start signal from the master, the slave
address (4 bits), the “don’t care” bits (3 bits) and the
R/W bit which is a logic low, is placed onto the bus by
the master transmitter. This indicates to the
addressed slave receiver that a byte with a word
address will follow after it has generated an Acknowl-
edge bit during the ninth clock cycle. Therefore, the
next byte transmitted by the master is the word
address and will be written into the address pointer of
Operation
Read
Write
Control Code
1010
1010
Chip Select
xxx
xxx
R/W
1
0
the 24LC21. After receiving another Acknowledge
signal from the 24LC21 the master device will transmit
the data word to be written into the addressed mem-
ory location. The 24LC21 acknowledges again and
FIGURE 3-5:
Start
CONTROL BYTE
ALLOCATION
Read/Write
the master generates a Stop condition. This initiates
the internal write cycle, and during this time the
24LC21 will not generate Acknowledge signals
(Figure 4-1).
It is required that V CLK be held at a logic high level in
order to program the device. This applies to byte write
SLAVE ADDRESS
R/W
A
and page write operation. Note that V CLK can go low
while the device is in its self-timed program operation
and not affect programming.
4.2
Page Write
1
0
1
0
x
x
x
The write control byte, word address and the first data
byte are transmitted to the 24LC21 in the same way as
in a byte write. But instead of generating a Stop condi-
tion the master transmits up to eight data bytes to the
24LC21, which are temporarily stored in the on-chip
page buffer and will be written into the memory after the
master has transmitted a Stop condition. After the
receipt of each word, the three lower order address
pointer bits are internally incremented by one. The
higher order five bits of the word address remains
constant. If the master should transmit more than eight
words prior to generating the Stop condition, the
address counter will roll over and the previously
received data will be overwritten. As with the byte write
operation, once the Stop condition is received an
internal write cycle will begin (Figure 4-3).
? 2004 Microchip Technology Inc.
DS21095J-page 7
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