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参数资料
| 型号： | 25LC640XT-I/ST |
| 厂商： | Microchip Technology |
| 文件页数： | 10/24页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 64KBIT 2MHZ 8TSSOP |
| 标准包装： | 2,500 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 64K (8K x 8) |
| 速度： | 2MHz |
| 接口： | SPI 3 线串行 |
| 电源电压： | 2.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 8-TSSOP |
| 包装： | 带卷 (TR) |
25AA640/25LC640
3.5
Read Status Register Instruction
The Write Enable Latch (WEL) bit indicates the status
( RDSR )
The Read Status Register instruction ( RDSR ) provides
access to the STATUS register. The STATUS register
may be read at any time, even during a write cycle. The
STATUS register is formatted as follows:
of the write enable latch. When set to a ‘ 1 ’, the latch
allows writes to the array and STATUS register, when
set to a ‘ 0 ’, the latch prohibits writes to the array and
STATUS register. The state of this bit can always be
updated via the WREN or WRDI commands regardless
of the state of write protection on the STATUS register.
7
6
5
4
3
2
1
0
This bit is read-only.
WPEN X X X BP1 BP0 WEL WIP
The Write-In-Process (WIP) bit indicates whether the
25XX640 is busy with a write operation. When set to a
‘ 1 ’, a write is in progress, when set to a ‘ 0 ’, no write is
in progress. This bit is read-only.
The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write-protected. These bits
are set by the user issuing the WRSR instruction. These
bits are nonvolatile.
See Figure 3-6 for RDSR timing sequence.
FIGURE 3-6:
CS
READ STATUS REGISTER TIMING SEQUENCE
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCK
Instruction
SI
0
0
0
0
0
1
0
1
High-Impedance
Data from STATUS Register
SO
7
6
5
4
3
2
1
0
DS21223H-page 10
? 2008 Microchip Technology Inc.
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