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参数资料
| 型号： | 2N3958 |
| 厂商： | Vishay Intertechnology,Inc. |
| 英文描述： | Monolithic Dual N-Channel JFET(最小栅源击穿电压-50V，最大栅极工作电流-50pA的双N沟道结型场效应管) |
| 中文描述： | 单片双N沟道场效应（最小栅源击穿电压- 50V的最大栅极工作电流，50pA的的双?沟道结型场效应管） |
| 文件页数： | 2/5页 |
| 文件大小： | 72K |
| 代理商： | 2N3958 |
2N3958
2
Siliconix
P-37995—Rev. A, 11-Aug-94
Specifications
a
Limits
Parameter
Symbol
Test Conditions
Min
Typ
b
Max
Unit
Static
Gate-Source Breakdown Voltage
V
(BR)GSS
I
G
= –1 A, V
DS
= 0 V
–50
–57
V
Gate-Source Cutoff Voltage
V
GS(off)
V
DS
= 20 V, I
D
= 1 nA
–1.0
–2
–4.5
Saturation Drain Current
c
I
DSS
V
DS
= 20 V, V
GS
= 0 V
0.5
3
5
mA
Gate Reverse Current
I
GSS
V
GS
= –30 V, V
DS
= 0 V
–10
–100
pA
T
A
= 150 C
–20
–500
nA
Gate Operating Current
I
G
V
DG
= 20 V, I
D
= 200 A
–5
–50
pA
T
A
=125 C
–0.8
–250
nA
Gate Source Voltage
Gate-Source Voltage
V
GS
V
DG
= 20 V, I
D
= 200 A
–0.5
–1.5
–4
I
D
= 50 A
–4.2
V
Gate-Source Forward Voltage
V
GS(F)
I
G
= 1 mA, V
DS
= 0 V
2
Dynamic
Common-Source
Forward Transconductance
g
fs
V
DS
= 20 V, V
GS
= 0 V
f = 1 kHz
1
2.5
3
mS
Common-Source Output Conductance
g
os
2
35
S
Common-Source Input Capacitance
C
iss
= 20 V V
V
DS
= 20 V, V
GS
= 0 V
f = 1 MHz
3
4
Common-Source
Reverse Transfer Capacitance
C
rss
1
1.2
pF
Drain-Gate Capacitance
C
dg
V
DG
= 10 V, I
S
= 0 , f = 1 MHz
1.5
Equivalent Input Noise Voltage
e
n
V
DS
= 20 V, V
GS
= 0 V, f = 1 kHz
9
nV
√
Hz
Noise Figure
NF
V
DS
= 20 V, V
GS
= 0 V
f = 100 Hz, R
G
= 10 M
0.5
dB
Matching
Differential Gate-Source Voltage
|V
GS1
–V
GS2
|
V
DG
= 20 V, I
D
= 200 A
25
mV
Gate-Source Voltage Differential Change
with Temperature
|V
GS1
–V
GS2
|
T
V
DG
= 20 V, I
D
= 200 A
T
A
= –55 to 125 C
100
V/ C
Saturation Drain Current Ratio
I
DSS1
I
DSS2
V
DS
= 20 V, V
GS
= 0 V
0.85
0.97
1
Transconductance Ratio
g
fs1
g
fs2
V
DS
= 20 V, I
D
= 200 A
f = 1 kHz
0.85
0.97
1
Differential Output Conductance
|g
os1
–g
os2
|
0.1
S
Differential Gate Current
|I
G1
–I
G2
|
V
DG
= 20 V, I
D
= 200 A
T
A
= 125 C
0.1
10
nA
Common Mode Rejection Ratio
d
CMRR
V
DG
= 10 to 20 V, I
D
= 200 A
100
dB
Notes
a.
b.
c.
d.
T
A
= 25 C unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Pulse test: PW
300 s duty cycle
3%.
This parameter not registered with JEDEC.
NQP
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| 2N3958_PDIP | 制造商:MICROSS 制造商全称:MICROSS 功能描述:a Low Noise, Low Drift, Monolithic Dual N-Channel JFET |
| 2N3958_SOIC | 制造商:MICROSS 制造商全称:MICROSS 功能描述:a Low Noise, Low Drift, Monolithic Dual N-Channel JFET |
| 2N3958_TO-71 | 制造商:MICROSS 制造商全称:MICROSS 功能描述:a Low Noise, Low Drift, Monolithic Dual N-Channel JFET |
| 2N3958_TO-78 | 制造商:MICROSS 制造商全称:MICROSS 功能描述:a Low Noise, Low Drift, Monolithic Dual N-Channel JFET |
| 2N3958-E3 | 功能描述:JFET Dual 50V 0.05 RoHS:否 制造商:ON Semiconductor 晶体管极性:N-Channel 漏极电流（Vgs=0 时的 Idss）:50 mA 漏源电压 VDS:15 V 闸/源击穿电压: 漏极连续电流:50 mA 配置: 安装风格: 封装 / 箱体:SC-59 封装:Reel |
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