参数资料
| 型号： | 34LC02T-I/SN |
| 厂商： | Microchip Technology |
| 文件页数： | 12/36页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 2KBIT 1MHZ 8SOIC |
| 产品培训模块： | I2C Serial EEPROM |
| 标准包装： | 3,300 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 2K (256 x 8) |
| 速度： | 1MHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 2.2 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 带卷 (TR) |
| 其它名称： | 34LC02T-I/SNTR |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页当前第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页
34AA02/34LC02
7.0
WRITE PROTECTION
7.2
Software Write Protection (SWP)
The 34XX02 has two software write-protect features
(SWP and PSWP) that allows the lower half of the array
(addresses 00h-7Fh) to be write-protected, as well as
a WP pin that can be used to protect the entire array.
The permanent software write-protect feature is
enabled by sending the device a special command.
Once this feature has been enabled, it cannot be
reversed. The resettable software write-protect feature
is also enabled by sending the device a special
command but can be reset by issuing another special
command. In addition to the software protect features,
there is a WP pin that can be used to write-protect the
entire array, regardless of whether the software write-
protect register has been written or not.
Table 7-2 and Table 7-3 describe how the 34XX02 will
acknowledge specific commands under various
circumstances.
and Clear Software Write
Protection (CSWP)
In addition to hardware write-protect the 34XX02 has
an additional software write-protect feature that, when
set, protects the first 128 bytes (00-7Fh) of the array
from being written.
Setting the software write protection is done by sending
the SWP instruction. SWP can also then be cleared by
issuing a CSWP instruction (see Figure 7-1 ).
These two instructions follow the same format as the
BYTE WRITE instruction with the exception of the
Device Type Identifier, (typically ‘ 1010 ’, instead
changes to ‘ 0110 ’). Once this identifier is recognized
by the device, the rest of the Byte Write command,
address and data, are “don’t cares”. In addition to the
identifier, high voltage must be applied to the A0 pin of
the device and specific levels must be present on A1
7.1
Hardware Write Protection
and A2. See Table 7-1 for the available commands.
The WP pin allows the user to write-protect the entire
array (00-FF) when the pin is tied to V CC . If the pin is
tied to V SS the write protection is disabled.
7.3
Permanent Software Write-Protect
(PSWP)
The Permanent software write protection, or PSWP is
another instruction that may be used to permanently
protect the first 128 byte of the array. Once this
command is issued, the user will no longer have the
ability to clear this feature regardless of instruction,
power cycling, or state of the WP pin. Also, once this
instruction has been executed, the device will no
longer acknowledge the device identifier ‘ 0110 ’.
FIGURE 7-1:
SOFTWARE WRITE PROTECTION FOR SWP, CSWP, PSWP, OR CPSWP
Bus Activity
Master
S
T
A
R
Control
Byte
Address
Byte
Data
S
T
O
T
P
S 0 1 1 0 2 A A 0
SDA Line
A
1 0
P
Bus Activity
A
C
K
“Don’t Care”
A
C
K
A
“Don’t Care” C
K
DS22029F-page 12
? 2011 Microchip Technology Inc.
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