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参数资料
| 型号： | 48IMS7-05-9Z |
| 厂商： | POWER-ONE INC |
| 元件分类： | 电源模块 |
| 英文描述： | 1-OUTPUT 6.1 W DC-DC REG PWR SUPPLY MODULE |
| 文件页数： | 13/14页 |
| 文件大小： | 174K |
| 代理商： | 48IMS7-05-9Z |
REV. JUN 14, 2004
8/14
Adjustable Output Voltage (R input)
As a standard feature, the IMS 7 single and double output
units offer adjustable output voltage(s) by using the control
input R pin. If the R pin is left open circuit the output voltage
is set to
Uo nom. The output voltage is adjustable in the range
75...105 % of
Uo nom. The circuit works for single and double
output units in a different way. For output voltages
Uo >
Uo nom, the minimum input voltage Ui min (see: Electrical In-
put Data) increases proportionally to Uo/Uo nom.
Single output units:
The R input is referenced to the secondary side of the con-
verter. Adjustment of the output voltage is possible by
means of either an external resistor or a voltage source.
a) Adjustment by means of an external resistor
Rext1:
Depending upon the value of the required output voltage,
the resistor shall be connected
either: Between the R pin and Vo– to achieve an output
voltage adjustment range of approximately
Uo = 75...100 % Uo nom. (85...100% for 3.3 V outputs)
Uo
Rext1
≈ 4 k –––––––––
Uo nom – Uo
or: Between the R pin and Vo+ to achieve an output volt-
age range of approximately
Uo = 100...105 % Uo nom.
(
Uo – 2.5 V)
Rext2
≈ 4 k –––––––––––––––––––
2.5 V (
Uo/Uo nom – 1)
70
100
Uo [%]
t [ms]
05041
8
60
overload short circuit condition
switch-off
40
50
60
70
80
90
h [%]
05052
25
50
75
100
Po
Po nom
[%]
U i nom
U i max
U i min
Fig. 13
Overload switch-off (hiccup mode). Typical values.
Frequency of pulses: 16.5 Hz, puls duration: 8.5 ms
Fig. 14
Efficiency versus input voltage and load. Typical values
(48 IMS 7-12-12).
Auxiliary Functions
Inhibit Function
The output(s) of the converter may be enabled or disabled
by means of a logic signal (TTL, CMOS, etc.) applied to the
inhibit pin. No output voltage overshoot will occur when the
unit is turned on. If the inhibit function is not required the
inhibit pin should be connected to Vi– to enable the output
(active low logic, fail safe).
Converter operating:
–10 V...0.8 V
Converter inhibited
or inhibit pin left open:
2.4 V...
Ui max
Fig. 15
If the inhibit is not used the inhibit pin should be connected
to Vi–
Vi+
Vi –
i
06070
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