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参数资料
| 型号： | 554AD000159DGR |
| 厂商： | SILICON LABORATORIES |
| 元件分类： | VCXO, clock |
| 英文描述： | VCXO, CLOCK, LVPECL OUTPUT |
| 封装： | ROHS COMPLIANT PACKAGE-8 |
| 文件页数： | 9/14页 |
| 文件大小： | 238K |
| 代理商： | 554AD000159DGR |
Si554
4
Rev. 0.6
Table 5. CLK± Output Phase Jitter
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Phase Jitter (RMS)1,2,3
for FOUT > 500 MHz
φ
J
Kv = 33 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.26
—
ps
Kv = 45 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.27
0.26
—
Kv = 90 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.32
0.26
—
Kv = 135 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.40
0.27
—
Kv = 180 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.49
0.28
—
Kv = 356 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.87
0.33
—
Notes:
1. Differential Modes: LVPECL/LVDS/CML. Refer to AN255, AN256, and AN266 for further information.
2. For best jitter and phase noise performance, always choose the smallest KV that meets the application’s minimum APR
requirements. See “AN266: VCXO Tuning Slope (KV), Stability, and Absolute Pull Range (APR)” for more information.
3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply
rejection (PSR) advantage of Si55x versus SAW-based solutions.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 554AD000260DG | 制造商:Silicon Laboratories Inc 功能描述:OSCILLATOR - Trays |
| 554AD000260DGR | 制造商:Silicon Laboratories Inc 功能描述:OSCILLATOR - Tape and Reel |
| 554AD000290DG | 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 132.8125MHZ/155.52MHZ/156.25MHZ/166.63MHZ VCXO LV - Trays |
| 554AD000290DGR | 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 132.8125MHZ/155.52MHZ/156.25MHZ/166.63MHZ VCXO LV - Tape and Reel |
| 554AD000379DG | 功能描述:VCXO振荡器 Quad VCXO 7mmx5mm 8 pin RoHS:否 制造商:Fox 封装 / 箱体:5 mm x 3.2 mm 频率:19.2 Mhz 频率稳定性:2.5 PPM 输出格式: 封装:Reel 电源电压:3 V 端接类型:SMD/SMT 尺寸:3.2 mm W x 5 mm L x 1.5 mm H 最小工作温度:- 20 C 最大工作温度:+ 75 C |
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