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参数资料
| 型号： | 5962-0720801VXC |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | ADC |
| 英文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP84 |
| 封装： | CERAMIC, CFP-84 |
| 文件页数： | 20/20页 |
| 文件大小： | 681K |
| 代理商： | 5962-0720801VXC |
www.ti.com
Timing Characteristics
SGLS378 – MARCH 2008
Typical values at TC = 25°C, full temperature range is TC,MIN = –55°C to TC,MAX = 125°C, sampling rate = 500 MSPS, 50%
clock duty cycle, AVDD5 = 5 V, AVDD3 = 3.3 V, DVDD3 = 3.3 V, and 3 VPP differential clock (unless otherwise noted)
PARAMETER(1)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ta
Aperture delay
200
ps
Aperture jitter, rms
160
fs
Latency
3.5
cycles
tCLK
Clock period
2
50
ns
tCLKH
Clock pulse duration, high
1
ns
tCLKL
Clock pulse duration, low
1
ns
tDRY
CLK to DRY delay(2)
Zero crossing, 7 pF differential loading
1100
ps
tDATA
CLK to DATA/OVR delay(2)
Zero crossing, 7 pF differential loading
1600
ps
tSKEW
DATA to DRY skew
tDATA–tDRY , 7 pF differential loading
500
ps
tRISE
DRY/DATA/OVR rise time
7 pF differential loading
500
ps
tFALL
DRY/DATA/OVR fall time
7 pF differential loading
500
ps
(1)
Timing parameters are assured by design or characterization, but not production tested.
(2)
DRY, DATA and OVR are updated on the falling edge of CLK. The latency must be added to tDATA to determine the overall propagation
delay.
Copyright 2008, Texas Instruments Incorporated
9
Product Folder Link(s) :ADS5463-SP
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