参数资料
型号: 5962-8959839MZA
厂商: AUSTIN SEMICONDUCTOR INC
元件分类: SRAM
英文描述: 128K X 8 STANDARD SRAM, 20 ns, CDIP32
封装: 0.400 INCH, CERAMIC, DIP-32
文件页数: 12/17页
文件大小: 137K
代理商: 5962-8959839MZA
SRAM
MT5C1009
MT5C1009
Rev. 6.1 06/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
Austin Semiconductor, Inc.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (-55oC < T
C < 125
oC & -40oC to +85oC; V
CC = 5.0V +10%)
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES
READ CYCLE
READ cycle time
tRC
12
15
20
25
35
45
ns
Address access time
tAA
12
15
20
25
35
45
ns
Chip Enable access time
tACE
12
15
20
25
35
45
ns
Output hold from address change
tOH
3
3333
ns
Chip Enable to output in Low-Z
tLZCE
3
ns
4, 6, 7
Chip disable to output in High-Z
tHZCE
7
8
10
15
20
ns
4, 6, 7
Output Enable access time
tAOE
7
6
101520
ns
Output Enable to output in Low-Z
tLZOE
0
ns
4, 6, 7
Output disable to output in High-Z
tHZOE
7
6
101520
ns
4, 6, 7
WRITE CYCLE
WRITE cycle time
tWC
12
15
20
25
35
45
ns
Chip Enable to end of write
tCW
11
12
20
25
35
ns
Address valid to end of write
tAW
11
12
20
25
35
ns
Address setup time
tAS
0
0000
ns
Address hold from end of write
tAH
0
0000
ns
WRITE pulse width (OE High)
tWP
11
12
20
25
35
ns
Data setup time
tDS
8
10
15
20
ns
Data hold time
tDH
0
0000
ns
Write disable to output in Low-Z
tLZWE
5
ns
4, 6, 7
Write Enable to output in High-Z
tHZWE
7
9
101520
ns
4, 6, 7
-25
-35
-45
DESCRIPTION
-15
-20
SYMBOL
-12
相关PDF资料
PDF描述
MT5C1009F-45/883C 128K X 8 STANDARD SRAM, 45 ns, CDFP32
MT5C1009ECA-15/XT 128K X 8 STANDARD SRAM, 15 ns, CQCC32
5962-8959809MMA 128K X 8 STANDARD SRAM, 55 ns, CQCC32
5962-8959826MYA 128K X 8 STANDARD SRAM, 55 ns, DSO32
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