参数资料
型号: 5962-8967901XX
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: ADC
英文描述: 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CQCC44
封装: CERAMIC, LCC-44
文件页数: 3/13页
文件大小: 403K
代理商: 5962-8967901XX
MAX5820
Dual, 8-Bit, Low-Power, 2-Wire, Serial
Voltage-Output DAC
______________________________________________________________________________________
11
SERIAL DATA INPUT
C3
C2
C1
C0
D7
D6
D5
D4
FUNCTION
0000
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Load DAC A input and DAC registers with new data.
Contents of DAC B input registers are transferred to the
DAC register. All outputs are updated.
0001
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Load DAC B input and DAC registers with new data.
Contents of DAC A input registers are transferred to the
DAC register. All outputs are updated.
0100
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Load DAC A input register with new data. DAC outputs
remain unchanged.
0101
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Load DAC B input register with new data. DAC outputs
remain unchanged.
1000
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Data in all input registers is transferred to respective DAC
registers. All DAC outputs are updated simultaneously.
New data is loaded into DAC A input register.
1001
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Data in all input registers is transferred to respective DAC
registers. All DAC outputs are updated simultaneously.
New data is loaded into DAC B input register.
1100
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Load all DACs with new data and update all DAC outputs
simultaneously. Both input and DAC registers are updated
with new data.
1101
DAC
DATA
DAC
DATA
DAC
DATA
DAC
DATA
Load all input registers with new data. DAC outputs
remain unchanged.
1110
XXXX
Update all DAC outputs simultaneously. Device ignores
D7–D4. Do not send the data byte.
1111
0000
Extended command mode. The next word writes to the
power-down registers (see the Extended Command Mode
section).
1111
0001
Read DAC A data. The device expects an Sr condition
followed by an address word with R/
W = 1.
1111
0010
Read DAC B data. The device expects an Sr condition
followed by an address word with R/
W = 1.
Table 3. Command Byte Definitions
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