参数资料
型号: 5962-9466201MJA
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: DAC
英文描述: SERIAL INPUT LOADING, 1.8 us SETTLING TIME, 10-BIT DAC, CDIP24
封装: CERAMIC, DIP-24
文件页数: 7/14页
文件大小: 472K
代理商: 5962-9466201MJA
Absolute Maximum Ratings (Notes12)
If MilitaryAerospace specified devices are required
please contact the National Semiconductor Sales
OfficeDistributors for availability and specifications
Supply Voltage (AVCC DVCC)7V
Supply Voltage Difference (AVCC–DVCC)
g
55V
Voltage at Any Pin (Note 3)
GND b03V to
AVCC DVCC a03V
Input Current at Any Pin (Note 3)
5 mA
Package Input Current (Note 4)
30 mA
Power Dissipation (Note 5)
950 mW
ESD Susceptibility (Note 6)
Human Body Model
2000V
Machine Model
200V
Soldering Information
N Package (10 sec)
260 C
SO Package
Vapor Phase (60 sec)
215 C
Infrared (15 sec) (Note 7)
220 C
Storage Temperature
b
65 Cto a150 C
Operating Ratings (Notes12)
Supply Voltage
45V to 55V
Supply Voltage Difference (AVCC b DVCC)
g
1V
Temperature Range
TMIN k TA k TMAX
DAC1054CIN DAC1054CIWM
b
40 C k TA k 85 C
DAC1054CMJ883
b
55 C k TA k 125 C
Converter Electrical Characteristics
The following specifications apply for AVCC e DVCC e 5V VREF e 265V VBIAS e 14V RL e 2kX (RL is the load resistor on
the analog outputs – pins 2 13 17 and 23) and fCLK e 10 MHz unless otherwise specified Boldface limits apply for TA
e
TJ from TMIN to TMAX All other limits apply for TA e 25 C
Symbol
Parameter
Conditions
Typical
Limit
Units
(Note 8)
(Note 9)
(Limits)
STATIC CHARACTERISTICS
n
Resolution
10
bits
Monotonicity
(Note 10)
10
bits
Integral Linearity Error
(Note 11)
DAC1054CIN DAC1054CIWM
g
075
LSB (max)
Differential Linearity Error
g
10
LSB (max)
Fullscale Error
(Note 12)
g
30
mV
Fullscale Error Tempco
(Note 13)
b
38
ppm C
Zero Error
(Note 14)
g
25
mV
Zero Error Tempco
(Note 13)
b
38
ppm C
Power Supply Sensitivity
(Note 15)
b
34
dB (max)
DYNAMIC CHARACTERISTICS
tsa
Positive Voltage Output
(Note 16)
18
32
m
s
Settling Time
CL e 200 pF
tsb
Negative Voltage Output
(Note 16)
23
37
m
s
Settling Time
CL e 200 pF
Digital Crosstalk
(Note 17)
15
mVp-p
Digital Feedthrough
(Note 18)
15
mVp-p
Clock Feedthrough
(Note 19)
20
mVp-p
Channel-to-Channel Isolation
(Note 20)
b
71
dB
Glitch Energy
(Note 21)
7
nVbs
Peak Value of Largest Glitch
38
mV
PSRR
Power Supply Rejection Ratio
(Note 22)
b
49
dB
2
Obsolete
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