参数资料
型号: 5962P0052401VZA
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: 比较器
英文描述: COMPARATOR, 4000 uV OFFSET-MAX, 200 ns RESPONSE TIME, CDSO10
封装: CERAMIC, SOIC-10
文件页数: 5/30页
文件大小: 1043K
代理商: 5962P0052401VZA
LM111
RH Electrical Characteristics (Continued)
DC Drift Parameters
The following conditions apply, unless otherwise specified.
DC:
V
CC = ±15V, VCM =0
Delta calculations performed on QMLV devices at group B , subgroup 5.
Symbol
Parameter
Conditions
Notes
Min
Max
Unit
Sub-
groups
V
IO
Input Offset Voltage
V
I = 0V, RS =50
-0.5
0.5
mV
1
+V
CC = 29.5V, -VCC = -0.5V,
V
I = 0V, VCM = -14.5V,
R
S =50
-0.5
0.5
mV
1
+V
CC = 2V, -VCC = -28V,
V
I = 0V, VCM = +13V,
R
S =50
-0.5
0.5
mV
1
±I
IB
Input Bias Current
V
I = 0V, RS = 50K
-12.5
12.5
nA
1
+V
CC = 29.5V, -VCC = -0.5V,
V
I = 0V, VCM = -14.5V,
R
S = 50K
-12.5
12.5
nA
1
+V
CC = 2V, -VCC = -28V,
V
I = 0V, VCM = +13V,
R
S = 50K
-12.5
12.5
nA
1
I
CEX
Output Leakage Current
+V
CC = 18V, -VCC = -18V,
V
O = 32V
-5.0
5.0
nA
1
Electrical Characteristics
Post Radiation Limits
The following conditions apply, unless otherwise specified
Symbol
Parameter
Conditions
Notes
Min
Max
Unit
Sub-
groups
I
IO
Input Offset Current
+V
CC = 29.5V, VCC = 0.5V,
V
I = 0V, VCM = 14.5V,
R
S = 50K
50
+50
nA
1
+V
CC = 2V, VCC = 28V,
V
I = 0V, VCM = +13V, RS =
50K
50
+50
nA
1
±I
IB
Input Bias Current
V
I = 0V, RS = 50K
150
0.1
nA
1
+V
CC = 29.5V, VCC = 0.5V,
V
I = 0V, VCM = 14.5V,
R
S = 50K
175
0.1
nA
1
I
CEX
Output Leakage Current
+V
CC = 18V, VCC = 18V,
V
O = 32V
25
+25
nA
1
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 3: This rating applies for ±15V supplies. The positive input voltage limits is 30 V above the negative supply. The negative input voltage limits is equal to the
negative supply voltage or 30V below the positive supply, whichever is less.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package junction
to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax =(TJmax -TA)/θJA or the
number given in the Absolute Maximum Ratings, whichever is lower.
Note 5: Human body model, 1.5 k
in series with 100 pF.
Note 6: Datalog reading in K=V/mV.
Note 7: Pin names based on an 8 pin package configuration. When using higher pin count packages then:
Pin2&3are Inputs, Pin 5 is Balance, Pin 6 is
Balance / Strobe, Pin 7 is Output, and Pin 8 is V+. For example:
V56is the Voltage between the Balance and Balance / Strobe pins
Note 8: IST = 2mA at 55C
Note 9: Calculated parameter.
Note 10: Actual min. limit used is 5mA due to test setup.
LM1
1
1QML
www.national.com
13
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