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参数资料
| 型号： | 71M6521DE-IGT/F |
| 厂商： | Maxim Integrated |
| 文件页数： | 39/107页 |
| 文件大小： | 0K |
| 描述： | IC ENERGY METER 16K FLASH 64LQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 160 |
| 系列： | Single Converter Technology® |
| 测量误差： | 0.4% |
| 电源电压： | 3 V ~ 3.6 V |
| 测量仪表类型： | 单相，双相 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 管件 |
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71M6521DE/DH/FE Data Sheet
Physical Memory
Flash Memory: The 71M6521DE/DH/FE includes 16KB (71M6521DE/DH) or 32KB (71M6521FE) of on-chip flash
memory. The flash memory primarily contains MPU and CE program code. It also contains images of the CE DRAM,
MPU RAM, and I/O RAM. On power-up, before enabling the CE, the MPU copies these images to their respective
locations.
Allocated flash space for the CE program cannot exceed 1024 words (2KB). The CE program must begin on a 1KB
boundary of the flash address. The CE_LCTN[4:0] word defines which 1KB boundary contains the CE code. Thus,
the first CE instruction is located at 1024* CE_LCTN[4:0] . CE_LCTN must be defined before the CE is enabled.
The flash memory is segmented into 512 byte individually erasable pages.
The CE engine cannot access its program memory when flash write occurs. Thus, the flash write procedure is to
begin a sequence of flash writes when CE_BUSY falls (CE_BUSY interrupt) and to make sure there is sufficient time
to complete the sequence before CE_BUSY rises again. The actual time for the flash write operation will depend on
the exact number of cycles required by the CE program. Typically (CE program is 512 instructions, mux frame is 13
CK32 cycles), there will be 200μs of flash write time, enough for 4 bytes of flash write. If the CE code is shorter, there
will be even more time.
Two interrupts warn of collisions between the MPU firmware and the CE timing. If a flash write is attempted while the
CE is busy, the flash write will not execute and the FW_COL0 interrupt will be issued. If a flash write is still in
progress when the CE would otherwise begin a code pass, the code pass is skipped, the write is completed, and the
FW_COL1 interrupt is issued.
The bit FLASH66Z (see I/O RAM table) defines the speed for accessing flash memory. To minimize supply current
draw, this bit should be set to 1.
Flash erasure is initiated by writing a specific data pattern to specific SFR registers in the proper sequence. These
special pattern/sequence requirements prevent inadvertent erasure of the flash memory.
The mass erase sequence is:
1.
2.
Write 1 to the FLSH_MEEN bit (SFR address 0xB2[1].
Write pattern 0xAA to FLSH_ERASE (SFR address 0x94)
The mass erase cycle can only be initiated when the ICE port is enabled.
The page erase sequence is:
1.
2.
Write the page address to FLSH_PGADR (SFR address 0xB7[7:1]
Write pattern 0x55 to FLSH_ERASE (SFR address 0x94)
The MPU may write to the flash memory. This is one of the non-volatile storage options available to the user in
addition to external EEPROM.
FLSH_PWE (flash program write enable) differentiates 80515 data store instructions (MOVX@DPTR,A) between flash
and XRAM writes.
Updating individual bytes in flash memory:
The original state of a flash byte is 0xFF (all ones). Once, a value other than 0xFF is written to a flash memory cell,
overwriting with a different value usually requires that the cell is erased first. Since cells cannot be erased individually,
the page has to be copied to RAM, followed by a page erase. After this, the page can be updated in RAM and then
written back to the flash memory.
MPU RAM: The 71M6521DE/DH/FE includes 2k-bytes of static RAM memory on-chip (XRAM) plus 256-bytes of
internal RAM in the MPU core. The 2K-bytes of static RAM are used for data storage during normal MPU operations.
CE DRAM : The CE DRAM is the working data memory of the CE (128 32-bit words). The MPU can read and write
the CE DRAM as the primary means of data communication between the two processors.
Rev 3
Page: 39 of 107
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 71M6521DE-IGTR/F | 功能描述:计量片上系统 - SoC Residential Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 处理器系列:71M6511 类型:Metering SoC 最大时钟频率:70 Hz 程序存储器大小:64 KB 数据 RAM 大小:7 KB 接口类型:UART 可编程输入/输出端数量:12 片上 ADC: 安装风格:SMD/SMT 封装 / 箱体:LQFP-64 封装:Reel |
| 71M6521DE-IGTR/F1 | 功能描述:计量片上系统 - SoC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 处理器系列:71M6511 类型:Metering SoC 最大时钟频率:70 Hz 程序存储器大小:64 KB 数据 RAM 大小:7 KB 接口类型:UART 可编程输入/输出端数量:12 片上 ADC: 安装风格:SMD/SMT 封装 / 箱体:LQFP-64 封装:Reel |
| 71M6521DE-IM/F | 功能描述:计量片上系统 - SoC Residential Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 处理器系列:71M6511 类型:Metering SoC 最大时钟频率:70 Hz 程序存储器大小:64 KB 数据 RAM 大小:7 KB 接口类型:UART 可编程输入/输出端数量:12 片上 ADC: 安装风格:SMD/SMT 封装 / 箱体:LQFP-64 封装:Reel |
| 71M6521DEIM-DB | 制造商:Maxim Integrated Products 功能描述:Development Boards & Kits - 8051 71M6521DE Demo Brd |
| 71M6521DE-IMR/F | 功能描述:计量片上系统 - SoC Residential Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 处理器系列:71M6511 类型:Metering SoC 最大时钟频率:70 Hz 程序存储器大小:64 KB 数据 RAM 大小:7 KB 接口类型:UART 可编程输入/输出端数量:12 片上 ADC: 安装风格:SMD/SMT 封装 / 箱体:LQFP-64 封装:Reel |
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