参数资料
型号: 73M1903-IGV
厂商: TERIDIAN SEMICONDUCTOR CORP
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP32
封装: TQFP-32
文件页数: 43/45页
文件大小: 449K
代理商: 73M1903-IGV
73M1903
Modem Analog Front End
DATA SHEET
Page: 7 of 45
2005 TERIDIAN Semiconductor Corporation
Rev 1.4
or received. When held low, a late
FS operates as a chip select; the FS signal is active for all bits that are
transmitted or received. The TYPE input pin is sampled when the reset pin is active and ignored at all
other times. The final state of the TYPE pin as the reset pin is de-asserted determines the frame
synchronization mode used.
The bits transmitted on the SDOUT pin are defined as follows:
bit15 bit14 bit13 bit12 bit11 bit10 bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
RX15 RX14 RX13 RX12 RX11 RX10 RX9 RX8 RX7 RX6 RX5 RX4 RX3 RX2 RX1 RX0
If the Hardware Control bit (bit 0 of register 01h) is set to zero, the 16 bits that are received on the SDIN
are defined as follows:
bit15 bit14 bit13 bit12 bit11 bit10 bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
TX15 TX14 TX13 TX12 TX11 TX10 TX9 TX8 TX7 TX6 TX5 TX4 TX3 TX2 TX1 CTL
In this case TX0=0 is forced.
If the Hardware Control bit (bit 0 of register 01h) is set to one, the 16 bits that are received on the SDIN
input are defined as follows:
bit15 bit14 bit13 bit12 bit11 bit10 bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
TX15 TX14 TX13 TX12 TX11 TX10 TX9 TX8 TX7 TX6 TX5 TX4 TX3 TX2 TX1 TX0
Bit 15 is transmitted/received first. Bits RX15:0 are the receive code word. Bits TX15:0 are the transmit
code word. If the hardware control bit is set to one, a control frame is initiated between every pair of data
frames. If the hardware control bit is set to zero, CTL is used by software to request a control frame. If
CTL is high, a control frame will be initiated before the next data frame. A control frame allows the
controller to read or write status and control to the 73M1903.
The control word received on the SDIN pin is defined as follows:
bit15 bit14 bit13 bit12 bit11 bit10 bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
R/
W
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
The control word transmitted on the SDOUT pin is defined as follows:
bit15 bit14 bit13 bit12 bit11 bit10 bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
0
D7
D6
D5
D4
D3
D2
D1
D0
If the R/
W bit is set to a 0, the data byte transmitted on the SDOUT pin is all zeros and the data received
on the SDIN pin is written to the register pointed to by the received address bits; A6-A0. If the R/
W bit is
set to a 1, there is no write to any register and the data byte transmitted on the SDOUT pin is the data
contained in the register pointed to by address bits A6-A0. Only one control frame can occur between
any two data frames.
Writes to unimplemented registers are ignored. Reading an unimplemented register returns a value of 0.
The position of a control data frame is controlled by the SPOS; bit 1 of register 01h. If SPOS is set to a 0
the control frames occur mid way between data frames, i.e., the time between data frames is equal. If
SPOS is set to a 1, the control frame is of the way between consecutive data frames, i.e., the control
frame is closer to the first data frame. This is illustrated in Figure 3.
相关PDF资料
PDF描述
73M1903-IM SPECIALTY CONSUMER CIRCUIT, QCC32
73M1903-IGV/F SPECIALTY CONSUMER CIRCUIT, PQFP32
73M1903-IGV SPECIALTY CONSUMER CIRCUIT, PQFP32
73M1903-IM SPECIALTY CONSUMER CIRCUIT, QCC32
73M1903-IM/F SPECIALTY CONSUMER CIRCUIT, PQCC32
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