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| 型号： | 73M1903C-IMR/F |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 22/48页 |
| 文件大小： | 0K |
| 描述： | IC MODEM AFE MULTIREGIONAL 32QFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 通道数： | 2 |
| 电压 - 电源，模拟： | 3 V ~ 3.6 V |
| 电压 - 电源，数字： | 3 V ~ 3.6 V |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN（5x5） |
| 包装： | 带卷 (TR) |
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DS_1903C_033
73M1903C Data Sheet
Rev. 5.0
29
7
Test Modes
There are two loop back test modes that affect the configuration of the analog front end. The internal
loop back mode connects the serial bit stream generated by the analog receiver to the input of the analog
transmitter. This loop back mode is similar to a remote analog loop back mode and can be used to
evaluate the operation of the analog circuits. When using this loop back mode, the TXAN/TXAP pins
should not be externally coupled to the RXAP/RXAN pins. Set bit 4 (INTLB) in register 01h (CTRL2) to
enter this loop back mode.
The second loop back test mode is the external loop back mode, or local analog loop back mode. In this
mode, the analog transmitter outputs are fed back into the input of the analog receiver. Set bit 5 (ANALB)
in register 01h (CTRL2) to enter this loop back mode. In this mode, TBS (transmit bit stream) must be
kept to below a value that corresponds to less than 1.16V/2.31V x -6dB = 25% of the full scale code of +/-
32768 at TXD in order to ensure that the receiver is not overdriven beyond the maximum of 1.16 Vpkpk
diff for Rxg=11(0 dB) setting. See Table 17 for the maximum allowed transmit levels. Check the
transmitted data against received data via serial interface. This tests the functionality of essentially all
blocks of the chip.
There is a third loopback mode that bypasses the analog circuits entirely. Digital loop back forces the
transmitter digital serial bit stream (from DSDM) to be routed into the digital receiver’s sinc
3 filters. Set bit
6 (DIGLB) in register 01h (CTRL2) to enter this loop back mode.
7.1
Power Saving Modes
The 73M1903C has only one power conservation mode. When the ENFE, bit 7 in register 00h, is zero
the clocks to the filters and the analog are turned off. The transmit pins output a nominal 80 k
impedance. The clock to the serial port is running and the GPIO and other registers can be read or
updated.
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| 73M1903-IM/F1 | 功能描述:电信线路管理 IC RoHS:否 制造商:STMicroelectronics 产品:PHY 接口类型:UART 电源电压-最大:18 V 电源电压-最小:8 V 电源电流:30 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:VFQFPN-48 封装:Tray |
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