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| 型号： | 73S1210F-EB |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 3/126页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL 73S1210F DOC/CD CABLE |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1 |
| 系列： | * |
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73S1210F Data Sheet
DS_1210F_001
100
Rev. 1.4
Block Wait Time Registers (BWTB0): 0xFE1B
0x00, (BWTB1): 0xFE1A 0x00,
(BWTB2): 0xFE19
0x00, (BWTB3): 0xFE18 0x00
These registers are used to set the Block Waiting Time(27:0) (BWT). All of these parameters define the
maximum time the 73S1210F will have to wait for a character from the smart card. These registers serve
a dual purpose. When T=1, these registers are used to set up the block wait time. The block wait time
defines the time in ETUs between the beginning of the last character sent to smart card and the start bit
of the first character received from smart card. It can be used to detect an unresponsive card and should
be loaded by firmware prior to writing the last TX byte. When T=0, these registers are used to set up the
work wait time. The work wait time is defined as the time between the leading edge of two consecutive
characters being sent to or from the card. If a timeout occurs, an interrupt is generated to the firmware.
The firmware can then take appropriate action. A Wait Time Extension (WTX) is supported with the 28-
bit BWT.
Table 97: The BWTB0 Register
MSB
LSB
BWT.7
BWT.6
BWT.5
BWT.4
BWT.3
BWT.1
BWT.2
BWT.0
Table 98: The BWTB1 Register
MSB
LSB
BWT.15
BWT.14
BWT.13
BWT.12
BWT.11
BWT.10
BWT.9
BWT.8
Table 99: The BWTB2 Register
MSB
LSB
BWT.23
BWT.22
BWT.21
BWT.20
BWT.19
BWT.18
BWT.17
BWT.16
Table 100: The BWTB3 Register
MSB
LSB
–
BWT.27
BWT.26
BWT.25
BWT.24
Character Wait Time Registers (CWTB0): 0xFE1D
0x00, (CWTB1): 0xFE1C 0x00
These registers are used to hold the Character Wait Time(15:0) (CWT) or Initial Waiting Time(15:0) (IWT)
depending on the situation. Both the IWT and the CWT measure the time in ETUs between the leading
edge of the start of the current character received from the smart card and the leading edge of the start of
the next character received from the smart card. The only difference is the mode in which the card is
operating. When T=1 these registers are used to configure the CWT and these registers configure the IWT
when the ATR is being received. These registers should be loaded prior to receiving characters from the
smart card. Firmware must manage which time is stored in the register. If a timeout occurs, an interrupt is
generated to the firmware. The firmware can then take appropriate action.
Table 101: The CWTB0 Register
MSB
LSB
CWT.7
CWT.6
CWT.5
CWT.4
CWT.3
CWT.1
CWT.2
CWT.0
Table 102: The CWTB1 Register
MSB
LSB
CWT.15
CWT.14
CWT.13
CWT.12
CWT.11
CWT.10
CWT.9
CWT.8
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