参数资料
型号: 73S8009CN-DB
厂商: Maxim Integrated Products
文件页数: 14/30页
文件大小: 0K
描述: BOARD DEMO FOR 73S8009CN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
系列: *
73S8009CN Data Sheet
DS_8009_026
V D D
See NOTE 5
V P C See NOTE 1
0.1F
0.1F
0.1F
10 μ F
C1
C2
See NOTE 4
10 μ H
C3
C4
VDD _supply _to_uC
USB D- to/from_uC
USB D+ to/from_uC
OFF _interrupt_to_uC
I/OUC_to/from_uC
Pushbutton Switch
AUX1UC_to/from_uC
AUX2UC_to/from_uC
CMDVCC% _from_uC
CMDVCC# _from_uC
RSTIN_from_uC
1
2
3
4
5
6
7
8
I/OUC
AUX1UC
AUX2UC
CMDVCC%
CMDVCC#
RSTIN
CLKIN
RDY
ON/OFF
DM
I/O
AUX1
AUX2
VCC
RST
GND
24
23
22
21
20
19
18
17
SW1
27pF
See
CLKIN_from_uC
C5
NOTE 3
RDY_status_to_uC
See NOTE 6
73S80009CN
32 QFN
See
NOTE 2
OFF_ACK_from_uC
0
OFF_REQ_to_uC
SC /USB _from_uC
VDD
R2
27pF
C6
See
NOTE 3
4.7 μ F
20K
Card detection
0.47 μ F, Low ESR (<100mohms)
should be placed near the
NOTES:
1) VPC = 2.7V to 6.5V DC
C7
switch is
normally closed
C8
SC connecter contact
2) Resistor footprint is included in case some filtering is needed on CLK
3) Capacitors C4 and C5 are provisional and their footprints should be added for added noise rejection
if necessary.
4) Inductor must be rated for 400 mA maximum peak current.
5) VDD - 3.3V, +/- 0.3V, 40mA max. Schematic assumes VDD supplies power to the host controller.
Requires min two 0.1 μ F caps to gnd)
6) The RDY signal is optional. A short delay before releasing RSTIN should suffice for the RDY
signal function.
Smart Card Connector
CLK track should be routed
far from RST, I/O, C4 and C8
Figure 3: Typical 73S8009CN Application Schematic with a Main System Switch
14
Rev. 1.4
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