参数资料
型号: 73S8009R-IL/F
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO28
封装: LEAD FREE, SOP-28
文件页数: 20/23页
文件大小: 342K
代理商: 73S8009R-IL/F
73S8009R Data Sheet
DS_8009R_056
6
Rev. 1.3
Table 1 describes the pin functions for the device.
Table 1: 73S8009R Pin Definitions
Pin
Name
Pin
(SO28)
Pin
(QFN20)
Type
Description
Card Interface
I/O
25
15
IO
Card I/O: Data signal to/from card. Includes a pull-up
resistor to VCC.
AUX1
24
NA
IO
AUX1: Auxiliary data signal to/from card. Includes a pull-up
resistor to VCC.
AUX2
23
NA
IO
AUX2: Auxiliary data signal to/from card. Includes a pull-up
resistor to VCC.
RST
21
13
O
Card reset: provides reset signal to card.
CLK
19
11
O
Card clock: provides clock signal to card. The rate of this
clock is determined by the external clock frequency
provided on pin CLKIN.
PRES
26
16
I
Card Presence switch: active high indicates card is present.
Should be tied to GND when not used, but includes a high-
impedance pull-down current source.
PRES
16
10
I
Card Presence switch: active low indicates card is present.
Should be tied to VDD when not used, but includes a high-
impedance pull-up current source.
VCC
22
14
PSO
Card power supply – logically controlled by the sequencer,
output of LDO regulator. Requires an external filter
capacitor to GND.
GND
20
NA
GND
Card ground.
Miscellaneous Inputs and Outputs
CLKIN
11
5
I
Clock source for the card clock.
TEST1
2
19
This pin must be tied to GND in typical applications.
TEST2
14
8
This pin must be tied to GND in typical applications.
NC
3,17,18
NA
Non-connected pin.
Power Supply and Ground
VDD
28
17
System interface supply voltage and supply voltage for
internal circuitry.
VPC
15
9
LDO regulator power supply source.
GND
27
12
GND
Ground.
Microcontroller Interface
CS
1
18
I
When CS = 1, the control and signal pins are configured
normally. When CS is set low,
CMDVCC%, RSTIN, and
CMDVCC# are latched, IOUC, AUX1UC, and AUX2UC are
set to high-impedance pull-up mode and do not pass data
to or from the smart card. Signals RDY and
OFF are
disabled to prevent a low output and the internal pull-up
resistors are disconnected.
OFF
4
20
O
Interrupt signal to the processor. Active low, multi-function
indicating fault conditions and card presence. Open drain
output configuration. It includes an internal 20
kΩ pull-up to
VDD. The pull-up is disabled in PWRDN and CS=0 modes.
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