参数资料
型号: 74ABT544D,602
厂商: NXP Semiconductors
文件页数: 11/16页
文件大小: 0K
描述: IC TRANSCVR 3-ST 8BIT INV 24SOIC
标准包装: 30
系列: 74ABT
逻辑类型: 收发器,反相
元件数: 1
每个元件的位元数: 8
输出电流高,低: 32mA,64mA
电源电压: 4.5 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SOIC(0.295",7.50mm 宽)
供应商设备封装: 24-SO
包装: 管件
其它名称: 568-2485-5
935047950602
74ABT544
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 6 — 3 November 2011
4 of 16
NXP Semiconductors
74ABT544
Octal latched transceiver with dual enable; 3-state
6.
Functional description
6.1 Function table
[1]
H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition of LEXX or EXX (XX = AB or BA);
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition of LEXX or EXX (XX = AB or BA);
= LOW-to-HIGH clock transition of LEXX or EXX (XX = AB or BA);
NC = no change;
X = don’t care;
Z = high-impedance OFF-state.
6.2 Description
The 74ABT544 contains two sets of eight D-type latches, with separate control pins for
each set.
Using data flow from A-to-B as an example, when the A-to-B enable (EAB) input, the
A-to-B latch enable (LEAB) input and the A-to-B output enable (OEAB) input are all LOW,
the A-to-B path is transparent.
A subsequent LOW-to-HIGH transition of the LEAB signal puts the A data into the latches
where it is stored and the B outputs no longer change with the A inputs. With EAB and
OEAB both LOW, the 3-state B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B-to-A is similar, but using the EBA, LEBA, and OEBA inputs.
Table 3.
Function selection[1]
Input
Output
Status
OEXX
EXX
LEXX
An or Bn
Bn or An
H
X
Z
disabled
XH
X
XZ
L
L
h
Z
disabled + latch
lZ
LL
h
L
latch + display
lH
L
H
L
transparent
LH
L
H
X
NC
hold
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