- 您现在的位置：买卖IC网 > PDF目录360417 > 74ALVCH16823 (NXP Semiconductors N.V.) Automotive Catalog Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs 14-SOIC -40 to 125 PDF资料下载
参数资料
| 型号： | 74ALVCH16823 |
| 厂商： | NXP Semiconductors N.V. |
| 英文描述： | Automotive Catalog Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs 14-SOIC -40 to 125 |
| 中文描述： | 18位总线接口D型触发器的复位，使三态 |
| 文件页数： | 8/12页 |
| 文件大小： | 103K |
| 代理商： | 74ALVCH16823 |
Philips Semiconductors
Product specification
74ALVCH16823
18-bit D-type flip-flop (3-State)
1998 Jul 29
8
AC WAVEFORMS FOR V
CC
= 2.3V TO 2.7V AND
V
CC
< 2.3V RANGE
V
M
= 0.5 V
V
X
= V
OL
+ 0.15V
V
Y
= V
OH
–0.15V
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
VI
= V
CC
AC WAVEFORMS FOR V
CC
= 3.0V TO 3.6V AND
V
CC
= 2.7V RANGE
V
M
= 1.5 V
V
X
= V
OL
+ 0.3V
V
Y
= V
–0.3V
V
and V
OH
are the typical output voltage drop that occur with the
output load.
VI
= 2.7V
V
M
SH00017
nCP
nQn
V
M
t
w
t
PHL
V
M
t
PLH
1/f
MAX
V
M
3.0V or V
CC
whichever
is less
0V
0V
V
OH
Waveform 1. Clock (nCP) to Output (nQn) Propagation Delays,
Clock Pulse Width, and Maximum Clock Pulse Frequency
V
M
nMR
V
M
nQn
t
w
V
M
t
PHL
V
M
nCP
SH00018
3.0V or V
CC
whichever
is less
0V
3.0V or V
CC
whichever
is less
0V
0V
V
OH
t
REC
Waveform 2. Master Reset (MR) Pulse WIdth, MR to
Output propagation Delay and MR to Clock Recovery Time
nQ
n
OUTPUT
V
M
V
M
nCE, nD
n
INPUT
nCP INPUT
V
M
GND
V
I
GND
V
I
V
OL
V
OH
t
su
t
su
t
h
t
h
SH00155
NOTE: The data set-up and hold times for D
n
or CE input to the CP input
Waveform 3. Data Setup and Hold Times for the D
n
or CE input
to the CP input
t
PLZ
t
PZL
V
I
nOE INPUT
GND
V
CC
OUTPUT
LOW-to-OFF
OFF-to-LOW
V
OL
V
OH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
enabled
outputs
enabled
outputs
disabled
t
PHZ
V
M
V
M
V
M
t
PZH
V
X
V
Y
SW00308
Waveform 4. 3-State Enable and Disable Times
TEST CIRCUIT
PULSE
GENERATOR
R
T
V
IN
D.U.T.
V
OUT
C
L
V
CC
R
L
=500
SWITCH POSITION
TEST
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
SWITCH
Open
2
V
CC
GND
Test Circuit for 3-State Outputs
Open
GND
S
1
2
V
CC
DEFINITIONS
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitance
R
T
=Termination resistance should be equal to Z
OUT
of pulse generators.
V
CC
2.7V
2.7 – 3.6V
V
IN
V
CC
2.7V
SW00047
R
L
=500
Waveform 5. Load circuitry for switching times
相关PDF资料 |
PDF描述 |
|---|---|
| 74ALVCH16825 | Automotive Catalog Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs 14-TSSOP -40 to 125 |
| 74ALVCH16827 | 20-bit buffer/line driver, non-inverting 3-State |
| 74ALVCH16841DL | 20-bit bus interface D-type latch (3-State) |
| 74ALVCH16841 | 20-bit bus interface D-type latch 3-State |
| 74ALVCH16843 | 3-Line To 8-Line Decoders/Demultiplexers 16-SSOP -40 to 85 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 74ALVCH16823APA | 制造商:Rochester Electronics LLC 功能描述: 制造商:Integrated Device Technology Inc 功能描述: |
| 74ALVCH16823DG | 功能描述:触发器 18-BIT BUS INTERFACE 3-STATE RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| 74ALVCH16823DGG | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:18-bit bus-interface D-type flip-flop with reset and enable 3-State |
| 74ALVCH16823DGG,11 | 功能描述:触发器 18-BIT BUS INTERFACE RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| 74ALVCH16823DGG,112 | 制造商:NXP Semiconductors 功能描述: |
发布紧急采购，3分钟左右您将得到回复。